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11cd1d6a34
Add partition information to the spi-nor flash. This is required for accessing NOR flash via mtdparts. Signed-off-by: Masami Hiramatsu <masami.hiramatsu@linaro.org> Reviewed-by: Marek Behún <marek.behun@nic.cz>
125 lines
2.1 KiB
Plaintext
125 lines
2.1 KiB
Plaintext
// SPDX-License-Identifier: BSD-2-Clause-Patent
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//
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// Copyright (c) 2021, Linaro Limited. All rights reserved.
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//
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/ {
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aliases {
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spi_nor = &spi_nor;
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i2c0 = &i2c0;
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};
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spi_nor: spi@54800000 {
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compatible = "socionext,synquacer-spi";
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reg = <0x00 0x54800000 0x00 0x1000>;
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interrupts = <0x00 0x9c 0x04 0x00 0x9d 0x04 0x00 0x9e 0x04>;
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clocks = <&clk_alw_1_8>;
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clock-names = "iHCLK";
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socionext,use-rtm;
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socionext,set-aces;
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#address-cells = <1>;
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#size-cells = <0>;
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status = "okay";
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active_clk_edges;
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chipselect_num = <1>;
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spi-flash@0 {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "jedec,spi-nor";
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reg = <0>; /* Chip select 0 */
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spi-max-frequency = <31250000>;
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spi-rx-bus-width = <0x1>;
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spi-tx-bus-width = <0x1>;
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partitions {
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compatible = "fixed-partitions";
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#address-cells = <1>;
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#size-cells = <1>;
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partition@0 {
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label = "BootStrap-BL1";
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reg = <0x0 0x70000>;
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read-only;
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};
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partition@70000 {
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label = "Flash-Writer";
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reg = <0x70000 0x90000>;
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read-only;
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};
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partition@100000 {
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label = "SCP-BL2";
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reg = <0x100000 0x80000>;
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read-only;
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};
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partition@180000 {
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label = "FIP-TFA";
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reg = <0x180000 0x78000>;
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};
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partition@1f8000 {
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label = "Stage2Tables";
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reg = <0x1f8000 0x8000>;
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};
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partition@200000 {
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label = "U-Boot";
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reg = <0x200000 0x100000>;
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};
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partition@300000 {
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label = "UBoot-Env";
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reg = <0x300000 0x100000>;
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};
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partition@500000 {
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label = "Ex-OPTEE";
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reg = <0x500000 0x200000>;
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};
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};
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};
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};
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i2c0: i2c@51200000 {
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compatible = "socionext,synquacer-i2c";
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reg = <0x0 0x51200000 0x0 0x1000>;
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interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&clk_i2c>;
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clock-names = "pclk";
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clock-frequency = <400000>;
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#address-cells = <1>;
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#size-cells = <0>;
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status = "okay";
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pcf8563: rtc@51 {
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compatible = "nxp,pcf8563";
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reg = <0x51>;
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};
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};
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firmware {
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optee {
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status = "okay";
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};
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};
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};
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&smmu {
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status = "okay";
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};
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&pcie0 {
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status = "okay";
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};
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&pcie1 {
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status = "okay";
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};
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&sdhci {
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status = "okay";
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};
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