mirror of
				https://github.com/smaeul/u-boot.git
				synced 2025-10-31 12:08:19 +00:00 
			
		
		
		
	This is an sh2a device (max 266MHz) with FPU, video display controller (VDC), 8 serial ports, 4 I2C channels, 3 CAN ports, SD and on-chip USB. The RSK2+SH7269 board uses the SH7269 processor. It is often referred to as just rsk7269. Signed-off-by: Phil Edworthy <phil.edworthy@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
		
			
				
	
	
		
			27 lines
		
	
	
		
			558 B
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			27 lines
		
	
	
		
			558 B
		
	
	
	
		
			C
		
	
	
	
	
	
| #ifndef _ASM_CPU_SH7269_H_
 | |
| #define _ASM_CPU_SH7269_H_
 | |
| 
 | |
| /* Cache */
 | |
| #define CCR1		0xFFFC1000
 | |
| #define CCR		CCR1
 | |
| 
 | |
| /* SCIF */
 | |
| #define SCSMR_0		0xE8007000
 | |
| #define SCIF0_BASE	SCSMR_0
 | |
| #define SCSMR_1		0xE8007800
 | |
| #define SCIF1_BASE	SCSMR_1
 | |
| #define SCSMR_2		0xE8008000
 | |
| #define SCIF2_BASE	SCSMR_2
 | |
| #define SCSMR_3		0xE8008800
 | |
| #define SCIF3_BASE	SCSMR_3
 | |
| #define SCSMR_7		0xE800A800
 | |
| #define SCIF7_BASE	SCSMR_7
 | |
| 
 | |
| /* Timer(CMT) */
 | |
| #define CMSTR		0xFFFEC000
 | |
| #define CMCSR_0		0xFFFEC002
 | |
| #define CMCNT_0		0xFFFEC004
 | |
| #define CMCOR_0		0xFFFEC006
 | |
| 
 | |
| #endif	/* _ASM_CPU_SH7269_H_ */
 |