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	1: - board/altera/common/flash.c:flash_erase():
     o allow interrupts befor get_timer() call
     o check-up each erased sector and avoid unexpected timeouts
   - board/altera/dk1c20/dk1s10.c:board_early_init_f():
     o enclose sevenseg_set() in cpp condition
   - remove the ASMI configuration for DK1S10_standard_32 (never present)
   - fix some typed in mistakes in the NIOS documentation
2: - split DK1C20 configuration into several header files:
     o two new files for each NIOS CPU description
     o U-Boot related part is remaining in DK1C20.h
3: - split DK1S10 configuration into several header files:
     o two new files for each NIOS CPU description
     o U-Boot related part is remaining in DK1S10.h
4: - Add support for the Microtronix Linux Development Kit
     NIOS CPU configuration at the Altera Nios Development Kit,
     Stratix Edition (DK-1S10)
5: - Add documentation for the Altera Nios Development Kit,
     Stratix Edition (DK-1S10)
6: - Add support for the Nios Serial Peripharel Interface (SPI)
     (master only)
7: - Add support for the common U-Boot SPI framework at
     RTC driver DS1306
		
	
			
		
			
				
	
	
		
			154 lines
		
	
	
		
			4.8 KiB
		
	
	
	
		
			Plaintext
		
	
	
	
	
	
			
		
		
	
	
			154 lines
		
	
	
		
			4.8 KiB
		
	
	
	
		
			Plaintext
		
	
	
	
	
	
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			 Nios Development Kit
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			   Cyclone Editions
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		    Last Update: January 2, 2004
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====================================================================
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This file contains information regarding U-Boot and the Altera
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Nios Development Kit, Cyclone Edition (DK-1C20). For general Nios
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information see doc/README.nios.
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For those interested in contributing ... see HELP WANTED section
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in doc/README.nios.
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Contents:
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	1. Files
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	2. Memory Organization
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	3. Examples
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	4. Programming U-Boot into FLASH with GERMS
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	5. Active Serial Memory Interface (ASMI) Support
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====================================================================
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1. Files
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=========
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	board/altera/dk1c20/*
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	include/configs/DK1C20.h
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2. Memory Organization
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=======================
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	-The heap is placed below the monitor (U-Boot code).
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	-Global data is placed below the heap.
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	-The stack is placed below global data (&grows down).
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3. Examples
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============
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The hello_world example works fine. The default load address
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is 0x0100_0000 (the start of SDRAM).
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4. Programming U-Boot into FLASH with GERMS
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============================================
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The current version of the DK-1C20 port with the default
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configuration settings occupies about 81 KBytes of flash.
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A minimal configuration occupies less than 60 KByte (asmi
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and network support disabled).
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To program U-Boot into the DK-1C20 flash using GERMS do the
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following:
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1. From the command line, download U-Boot using the nios-run:
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	$ nios-run -r u-boot.srec
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This takes about 45 seconds (GERMS is not very speedy here).
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After u-boot is downloaded it will be executed. You should
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see the following:
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    U-Boot 1.0.0-pre (Oct  4 2003 - 07:39:24)
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    CPU: Nios-32 Rev. 3.3 (0x3038)
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    Reg file size: 256 LO_LIMIT/HI_LIMIT: 2/14
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    Board: Altera Nios 1C20 Development Kit
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    In:	   serial
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    Out:   serial
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    Err:   serial
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    ==>
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2. Quit nios-run and start your terminal application (e.g. start
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Hyperterminal or minicom).
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3. Download the u-boot code to RAM. When using Hyperterminal, do the
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following:
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   a.  From the u-boot command prompt start a binary download to SRAM:
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    ==> loadb 800000
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    b. Download u-boot.bin using kermit.
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4. From the U-Boot command prompt, erase flash 0x40000 to 0x5ffff:
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    ==> erase 1:4-5
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5. Copy the binary image from SRAM to flash:
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    ==> cp.b 800000 40000 10000
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U-Boot will now automatically start when the board is powered on or
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reset using the Standard-32 configuration. To start U-Boot with the
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Safe-32 configuration, enter the following GERMS command:
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    + g 40000
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5. Active Serial Memory Interface (ASMI) Support
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================================================
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ASMI is fully supported in U-Boot. Please note that ASMI is supported
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only on Cyclone devices. Do not expect ASMI to work with Stratix or
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APEX devices.
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		 ************* IMPORTANT *************
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	 ===================================================
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	IN ORDER FOR THE NIOS ASMI TO OPERATE PROPERLY, THE
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	CYCLONE DEVICE MUST BE CONFIGURED USING JTAG OR ASMI.
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There are two techniques you can use to bootstrap the ASMI. The
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first is to use the program_epcs utility that is part of Altera's SDK.
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But I've found program_epcs to be slow and cumbersome at best.
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An undocumented alternative is to use the Quartus device programing
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interface:
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    1. Select "Active Serial" mode.
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    2. Choose the xxx.pof file. For example, for the standard_32
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       configuration use the "standard_32.pof" file.
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    3. Attach your ByteBlaster to J28. Make sure you have the
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       cable attached properly -- the orientation of J28 is
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       different than J24 (the JTAG header). On J28, pin 1 is on
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       the bottom row, left-most pin.
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    4. Press and hold the "Power-On Reset" switch (SW10). You will
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       see the green "Loading" and red "Error" LEDs (LED3 and LED4)
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       in the on state.
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    5. While holding down the "Power-On Reset" switch, start the
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       programming sequence. This only takes about 10 seconds.
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    6. After programming is complete, release the "Power-On Reset"
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       switch. The Cyclone device should now load its configuration
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       from the EPCS4 (U59). The green "User" LED (LED 1) should be
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       blinking if the device was successfully loaded via ASMI.
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    7. Remove the ByteBlaster cable. The cable must be removed to
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       allow the Nios ASMI access to the EPCS4 device.
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After you have successfully programmed a configuration into the
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EPCS4, the ASMI will be used to load the Cyclone configuration
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unless the "Force Safe" switch (SW9) is pressed.
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NOTE: To maximize the amount of space available for program use,
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you can enable configuration compression in Quartus. With compression
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enabled, the size of the standard_32 configuration data is
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approximately 192 KBytes.
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To use the U-Boot ASMI commands, try typing "help asmi" at the
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command prompt. The command "asmi info" will show the current
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status of the ASMI.
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