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smaeul-u-boot/arch/arm/dts/imx6qdl-dhcom-pdk2.dtsi
Marcel Ziswiler d0399a46e7 imx6dl/imx6qdl: synchronise device trees with linux 
Synchronise device trees with linux-next next-20220708.

Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
2022-07-25 16:12:00 +02:00

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// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright (C) 2015-2021 DH electronics GmbH
* Copyright (C) 2018 Marek Vasut <marex@denx.de>
*/
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include <dt-bindings/leds/common.h>
#include <dt-bindings/pwm/pwm.h>
/ {
chosen {
stdout-path = "serial0:115200n8";
};
clk_ext_audio_codec: clock-codec {
#clock-cells = <0>;
clock-frequency = <24000000>;
compatible = "fixed-clock";
};
display_bl: display-bl {
brightness-levels = <0 16 22 30 40 55 75 102 138 188 255>;
compatible = "pwm-backlight";
default-brightness-level = <8>;
enable-gpios = <&gpio3 27 GPIO_ACTIVE_HIGH>; /* GPIO G */
pwms = <&pwm1 0 50000 PWM_POLARITY_INVERTED>;
status = "okay";
};
lcd_display: disp0 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "fsl,imx-parallel-display";
interface-pix-fmt = "rgb24";
pinctrl-0 = <&pinctrl_ipu1_lcdif &pinctrl_dhcom_g>;
pinctrl-names = "default";
status = "okay";
port@0 {
reg = <0>;
lcd_display_in: endpoint {
remote-endpoint = <&ipu1_di0_disp0>;
};
};
port@1 {
reg = <1>;
lcd_display_out: endpoint {
remote-endpoint = <&lcd_panel_in>;
};
};
};
gpio-keys {
#size-cells = <0>;
compatible = "gpio-keys";
button-0 {
gpios = <&gpio1 2 GPIO_ACTIVE_LOW>; /* GPIO A */
label = "TA1-GPIO-A";
linux,code = <KEY_A>;
pinctrl-0 = <&pinctrl_dhcom_a>;
pinctrl-names = "default";
wakeup-source;
};
button-1 {
gpios = <&gpio1 4 GPIO_ACTIVE_LOW>; /* GPIO B */
label = "TA2-GPIO-B";
linux,code = <KEY_B>;
pinctrl-0 = <&pinctrl_dhcom_b>;
pinctrl-names = "default";
wakeup-source;
};
button-2 {
gpios = <&gpio1 5 GPIO_ACTIVE_LOW>; /* GPIO C */
label = "TA3-GPIO-C";
linux,code = <KEY_C>;
pinctrl-0 = <&pinctrl_dhcom_c>;
pinctrl-names = "default";
wakeup-source;
};
button-3 {
gpios = <&gpio6 3 GPIO_ACTIVE_LOW>; /* GPIO D */
label = "TA4-GPIO-D";
linux,code = <KEY_D>;
pinctrl-0 = <&pinctrl_dhcom_d>;
pinctrl-names = "default";
wakeup-source;
};
};
led {
compatible = "gpio-leds";
/*
* Disable led-5, because GPIO E is
* already used as touch interrupt.
*/
led-5 {
color = <LED_COLOR_ID_GREEN>;
default-state = "off";
function = LED_FUNCTION_INDICATOR;
gpios = <&gpio4 5 GPIO_ACTIVE_HIGH>; /* GPIO E */
pinctrl-0 = <&pinctrl_dhcom_e>;
pinctrl-names = "default";
status = "disabled";
};
led-6 {
color = <LED_COLOR_ID_GREEN>;
default-state = "off";
function = LED_FUNCTION_INDICATOR;
gpios = <&gpio4 20 GPIO_ACTIVE_HIGH>; /* GPIO F */
pinctrl-0 = <&pinctrl_dhcom_f>;
pinctrl-names = "default";
};
led-7 {
color = <LED_COLOR_ID_GREEN>;
default-state = "off";
function = LED_FUNCTION_INDICATOR;
gpios = <&gpio4 7 GPIO_ACTIVE_HIGH>; /* GPIO H */
pinctrl-0 = <&pinctrl_dhcom_h>;
pinctrl-names = "default";
};
led-8 {
color = <LED_COLOR_ID_GREEN>;
default-state = "off";
function = LED_FUNCTION_INDICATOR;
gpios = <&gpio4 8 GPIO_ACTIVE_HIGH>; /* GPIO I */
pinctrl-0 = <&pinctrl_dhcom_i>;
pinctrl-names = "default";
};
};
panel {
backlight = <&display_bl>;
compatible = "edt,etm0700g0edh6";
port {
lcd_panel_in: endpoint {
remote-endpoint = <&lcd_display_out>;
};
};
};
sound {
audio-codec = <&sgtl5000>;
audio-routing =
"MIC_IN", "Mic Jack",
"Mic Jack", "Mic Bias",
"LINE_IN", "Line In Jack",
"Headphone Jack", "HP_OUT";
compatible = "fsl,imx-audio-sgtl5000";
model = "imx-sgtl5000";
mux-ext-port = <3>;
mux-int-port = <1>;
ssi-controller = <&ssi1>;
};
};
&audmux {
pinctrl-0 = <&pinctrl_audmux_ext>;
pinctrl-names = "default";
status = "okay";
};
&can1 {
status = "okay";
};
&can2 {
status = "disabled";
};
/* 1G ethernet */
/delete-node/ &ethphy0;
&fec {
phy-mode = "rgmii";
phy-handle = <&ethphy7>;
pinctrl-0 = <&pinctrl_enet_1G>;
pinctrl-names = "default";
status = "okay";
mdio {
#address-cells = <1>;
#size-cells = <0>;
ethphy7: ethernet-phy@7 { /* KSZ 9021 */
compatible = "ethernet-phy-ieee802.3-c22";
interrupt-parent = <&gpio1>;
interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
pinctrl-0 = <&pinctrl_ethphy7>;
pinctrl-names = "default";
reg = <7>;
reset-assert-us = <1000>;
reset-deassert-us = <1000>;
reset-gpios = <&gpio3 29 GPIO_ACTIVE_LOW>;
rxc-skew-ps = <3000>;
rxd0-skew-ps = <0>;
rxd1-skew-ps = <0>;
rxd2-skew-ps = <0>;
rxd3-skew-ps = <0>;
rxdv-skew-ps = <0>;
txc-skew-ps = <3000>;
txd0-skew-ps = <0>;
txd1-skew-ps = <0>;
txd2-skew-ps = <0>;
txd3-skew-ps = <0>;
txen-skew-ps = <0>;
};
};
};
&hdmi {
ddc-i2c-bus = <&i2c2>;
status = "okay";
};
&i2c2 {
sgtl5000: codec@a {
#sound-dai-cells = <0>;
clocks = <&clk_ext_audio_codec>;
compatible = "fsl,sgtl5000";
reg = <0x0a>;
VDDA-supply = <&reg_3p3v>;
VDDIO-supply = <&sw2_reg>;
};
touchscreen@38 {
compatible = "edt,edt-ft5406";
interrupt-parent = <&gpio4>;
interrupts = <5 IRQ_TYPE_EDGE_FALLING>; /* GPIO E */
pinctrl-0 = <&pinctrl_dhcom_e>;
pinctrl-names = "default";
reg = <0x38>;
};
};
&ipu1_di0_disp0 {
remote-endpoint = <&lcd_display_in>;
};
&pcie {
pinctrl-0 = <&pinctrl_pcie &pinctrl_dhcom_j>;
reset-gpio = <&gpio6 14 GPIO_ACTIVE_LOW>; /* GPIO J */
status = "okay";
};
&pwm1 {
status = "okay";
};
&ssi1 {
status = "okay";
};
&usbh1 {
disable-over-current;
};
&usdhc2 { /* SD card */
status = "okay";
};
&iomuxc {
pinctrl-0 = <
/*
* The following DHCOM GPIOs are used on this board.
* Therefore, they have been removed from the list below.
* A: key TA1
* B: key TA2
* C: key TA3
* D: key TA4
* E: touchscreen
* F: led6
* G: backlight enable
* H: led7
* I: led8
* J: PCIe reset
*/
&pinctrl_hog_base
&pinctrl_dhcom_k &pinctrl_dhcom_l
&pinctrl_dhcom_m &pinctrl_dhcom_n &pinctrl_dhcom_o
&pinctrl_dhcom_p &pinctrl_dhcom_q &pinctrl_dhcom_r
&pinctrl_dhcom_s &pinctrl_dhcom_t &pinctrl_dhcom_u
&pinctrl_dhcom_v &pinctrl_dhcom_w &pinctrl_dhcom_int
>;
pinctrl-names = "default";
pinctrl_audmux_ext: audmux-ext-grp {
fsl,pins = <
MX6QDL_PAD_CSI0_DAT4__AUD3_TXC 0x130b0
MX6QDL_PAD_CSI0_DAT5__AUD3_TXD 0x110b0
MX6QDL_PAD_CSI0_DAT6__AUD3_TXFS 0x130b0
MX6QDL_PAD_CSI0_DAT7__AUD3_RXD 0x130b0
>;
};
pinctrl_enet_1G: enet-1G-grp {
fsl,pins = <
MX6QDL_PAD_ENET_MDC__ENET_MDC 0x100b0
MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x100b0
MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x100b0
MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0
MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0
MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0
MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0
MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0
MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0
MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x100b0
MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x100b0
MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x100b0
MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x100b0
MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x100b0
MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x100b0
>;
};
pinctrl_ethphy7: ethphy7-grp {
fsl,pins = <
MX6QDL_PAD_EIM_D26__GPIO3_IO26 0xb1 /* WOL */
MX6QDL_PAD_EIM_D29__GPIO3_IO29 0xb0 /* Reset */
MX6QDL_PAD_GPIO_0__GPIO1_IO00 0xb1 /* Int */
>;
};
pinctrl_ipu1_lcdif: ipu1-lcdif-grp {
fsl,pins = <
MX6QDL_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK 0x38
MX6QDL_PAD_DI0_PIN2__IPU1_DI0_PIN02 0x38
MX6QDL_PAD_DI0_PIN3__IPU1_DI0_PIN03 0x38
MX6QDL_PAD_DI0_PIN15__IPU1_DI0_PIN15 0x38
MX6QDL_PAD_DISP0_DAT0__IPU1_DISP0_DATA00 0x38
MX6QDL_PAD_DISP0_DAT1__IPU1_DISP0_DATA01 0x38
MX6QDL_PAD_DISP0_DAT2__IPU1_DISP0_DATA02 0x38
MX6QDL_PAD_DISP0_DAT3__IPU1_DISP0_DATA03 0x38
MX6QDL_PAD_DISP0_DAT4__IPU1_DISP0_DATA04 0x38
MX6QDL_PAD_DISP0_DAT5__IPU1_DISP0_DATA05 0x38
MX6QDL_PAD_DISP0_DAT6__IPU1_DISP0_DATA06 0x38
MX6QDL_PAD_DISP0_DAT7__IPU1_DISP0_DATA07 0x38
MX6QDL_PAD_DISP0_DAT8__IPU1_DISP0_DATA08 0x38
MX6QDL_PAD_DISP0_DAT9__IPU1_DISP0_DATA09 0x38
MX6QDL_PAD_DISP0_DAT10__IPU1_DISP0_DATA10 0x38
MX6QDL_PAD_DISP0_DAT11__IPU1_DISP0_DATA11 0x38
MX6QDL_PAD_DISP0_DAT12__IPU1_DISP0_DATA12 0x38
MX6QDL_PAD_DISP0_DAT13__IPU1_DISP0_DATA13 0x38
MX6QDL_PAD_DISP0_DAT14__IPU1_DISP0_DATA14 0x38
MX6QDL_PAD_DISP0_DAT15__IPU1_DISP0_DATA15 0x38
MX6QDL_PAD_DISP0_DAT16__IPU1_DISP0_DATA16 0x38
MX6QDL_PAD_DISP0_DAT17__IPU1_DISP0_DATA17 0x38
MX6QDL_PAD_DISP0_DAT18__IPU1_DISP0_DATA18 0x38
MX6QDL_PAD_DISP0_DAT19__IPU1_DISP0_DATA19 0x38
MX6QDL_PAD_DISP0_DAT20__IPU1_DISP0_DATA20 0x38
MX6QDL_PAD_DISP0_DAT21__IPU1_DISP0_DATA21 0x38
MX6QDL_PAD_DISP0_DAT22__IPU1_DISP0_DATA22 0x38
MX6QDL_PAD_DISP0_DAT23__IPU1_DISP0_DATA23 0x38
>;
};
};
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