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2395625209
The GW74xx is based on the i.MX 8M Plus SoC featuring:
- LPDDR4 DRAM
- eMMC FLASH
- Gateworks System Controller
- PCIe Gen 3.0 switch (build option)
- USB 3.0 HUB
- USB Type-C front panel connector
- GPS
- 3-axis accelerometer
- CAN bus
- 6x GbE RJ45 front-panel jacks
- 1x IMX8M FEC RGMII GbE (with Passive PoE)
- 5x IMX8M EQOS RGMII 6 port GbE Switch
(1x with 802.3af class 5 Active PoE)
- RS232/RS485/RS422 serial transceiver
- MIPI header (DSI/CSI/GPIO/PWM/I2S)
- DigI/O header (UART/GPIO/I2C/ADC)
- 802.11ac WiFi
- Bluetooth BLE
- 3x MiniPCIe sockets with PCI/USB
- 1x M.2 Socket with USB2.0, PCIe, and dual-SIM
- PMIC
- Wide range DC input supply (8V to 60V DC)
Do the following to add support for this and future imx8mp-venice boards:
- add dts
- add DRAM config
- add PMIC config
- add IMX8MP support in spl.c and venice.c
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
23 lines
673 B
C
23 lines
673 B
C
/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* Copyright 2021 Gateworks Corporation
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*/
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#ifndef __LPDDR4_TIMING_H__
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#define __LPDDR4_TIMING_H__
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#ifdef CONFIG_IMX8MM
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extern struct dram_timing_info dram_timing_512mb;
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extern struct dram_timing_info dram_timing_1gb;
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extern struct dram_timing_info dram_timing_2gb;
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extern struct dram_timing_info dram_timing_4gb;
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#elif CONFIG_IMX8MN
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extern struct dram_timing_info dram_timing_1gb_single_die;
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extern struct dram_timing_info dram_timing_2gb_single_die;
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extern struct dram_timing_info dram_timing_2gb_dual_die;
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#elif CONFIG_IMX8MP
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extern struct dram_timing_info dram_timing_4gb_dual_die;
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#endif
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#endif /* __LPDDR4_TIMING_H__ */
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