mirror of
https://github.com/smaeul/u-boot.git
synced 2025-10-31 03:58:17 +00:00
199537309b
Add support for DH Electronics DHCOM SoM and PDK2 rev. 400 carrier board. This is an SoM with STM32MP15xx and an evaluation kit. The baseboard provides Ethernet, UART, USB, CAN and optional display. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Patrick Delaunay <patrick.delaunay@st.com> Cc: Patrice Chotard <patrice.chotard@st.com> Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
89 lines
2.3 KiB
Plaintext
89 lines
2.3 KiB
Plaintext
// SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause
|
|
/*
|
|
* Copyright (C) 2019 Marek Vasut <marex@denx.de>
|
|
*/
|
|
|
|
#include "stm32mp15xx-dhcom.dtsi"
|
|
|
|
/ {
|
|
model = "STMicroelectronics STM32MP15xx DHCOM Premium Developer Kit (2)";
|
|
compatible = "dh,stm32mp15xx-dhcom-pdk2", "st,stm32mp15x";
|
|
|
|
aliases {
|
|
serial0 = &uart4;
|
|
ethernet0 = ðernet0;
|
|
};
|
|
|
|
chosen {
|
|
stdout-path = "serial0:115200n8";
|
|
};
|
|
|
|
ethernet_vio: vioregulator {
|
|
compatible = "regulator-fixed";
|
|
regulator-name = "vio";
|
|
regulator-min-microvolt = <3300000>;
|
|
regulator-max-microvolt = <3300000>;
|
|
gpio = <&gpiog 3 GPIO_ACTIVE_LOW>;
|
|
regulator-always-on;
|
|
regulator-boot-on;
|
|
};
|
|
};
|
|
|
|
ðernet0 {
|
|
status = "okay";
|
|
pinctrl-0 = <ðernet0_rmii_pins_a>;
|
|
pinctrl-1 = <ðernet0_rmii_pins_sleep_a>;
|
|
pinctrl-names = "default", "sleep";
|
|
phy-mode = "rmii";
|
|
max-speed = <100>;
|
|
phy-handle = <&phy0>;
|
|
st,eth_ref_clk_sel;
|
|
phy-reset-gpios = <&gpioh 15 GPIO_ACTIVE_LOW>;
|
|
|
|
mdio0 {
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
compatible = "snps,dwmac-mdio";
|
|
|
|
phy0: ethernet-phy@1 {
|
|
reg = <1>;
|
|
};
|
|
};
|
|
};
|
|
|
|
&pinctrl {
|
|
ethernet0_rmii_pins_a: rmii-0 {
|
|
pins1 {
|
|
pinmux = <STM32_PINMUX('G', 13, AF11)>, /* ETH1_RMII_TXD0 */
|
|
<STM32_PINMUX('G', 14, AF11)>, /* ETH1_RMII_TXD1 */
|
|
<STM32_PINMUX('B', 11, AF11)>, /* ETH1_RMII_TX_EN */
|
|
<STM32_PINMUX('A', 1, AF0)>, /* ETH1_RMII_REF_CLK */
|
|
<STM32_PINMUX('A', 2, AF11)>, /* ETH1_MDIO */
|
|
<STM32_PINMUX('C', 1, AF11)>; /* ETH1_MDC */
|
|
bias-disable;
|
|
drive-push-pull;
|
|
slew-rate = <2>;
|
|
};
|
|
pins2 {
|
|
pinmux = <STM32_PINMUX('C', 4, AF11)>, /* ETH1_RMII_RXD0 */
|
|
<STM32_PINMUX('C', 5, AF11)>, /* ETH1_RMII_RXD1 */
|
|
<STM32_PINMUX('A', 7, AF11)>; /* ETH1_RMII_CRS_DV */
|
|
bias-disable;
|
|
};
|
|
};
|
|
|
|
ethernet0_rmii_pins_sleep_a: rmii-sleep-0 {
|
|
pins1 {
|
|
pinmux = <STM32_PINMUX('G', 13, ANALOG)>, /* ETH1_RMII_TXD0 */
|
|
<STM32_PINMUX('G', 14, ANALOG)>, /* ETH1_RMII_TXD1 */
|
|
<STM32_PINMUX('B', 11, ANALOG)>, /* ETH1_RMII_TX_EN */
|
|
<STM32_PINMUX('A', 2, ANALOG)>, /* ETH1_MDIO */
|
|
<STM32_PINMUX('C', 1, ANALOG)>, /* ETH1_MDC */
|
|
<STM32_PINMUX('C', 4, ANALOG)>, /* ETH1_RMII_RXD0 */
|
|
<STM32_PINMUX('C', 5, ANALOG)>, /* ETH1_RMII_RXD1 */
|
|
<STM32_PINMUX('A', 1, ANALOG)>, /* ETH1_RMII_REF_CLK */
|
|
<STM32_PINMUX('A', 7, ANALOG)>; /* ETH1_RMII_CRS_DV */
|
|
};
|
|
};
|
|
};
|