Rayagonda Kokatanur c8b98482d8 board: ns3: define ddr memory layout
Add both DRAM banks memory information and
the corresponding MMU page table mappings.

Signed-off-by: Bharat Kumar Reddy Gooty <bharat.gooty@broadcom.com>
Signed-off-by: Rayagonda Kokatanur <rayagonda.kokatanur@broadcom.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-07-29 10:37:11 -04:00
..
2020-07-06 15:46:38 -04:00
2020-07-06 15:46:38 -04:00
2020-07-06 15:46:38 -04:00
2020-07-06 15:46:38 -04:00
2020-07-06 15:46:38 -04:00
2020-07-06 15:46:38 -04:00
2020-07-06 15:46:38 -04:00
2020-07-06 15:46:38 -04:00
2020-07-06 15:46:38 -04:00
2020-07-06 15:46:38 -04:00