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smaeul-u-boot/arch/riscv/dts
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Pragnesh Patel 8a3fd8440f sifive: dts: fu540: Add DDR controller and phy register settings 
Add DDR controller and phy register settings, taken from fsbl
(https://github.com/sifive/freedom-u540-c000-bootloader.git)

Signed-off-by: Pragnesh Patel <pragnesh.patel@sifive.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Tested-by: Jagan Teki <jagan@amarulasolutions.com>
2020-06-04 09:44:08 +08:00
..
ae350_32.dts
riscv: dts: Add #address-cells and #size-cells in nor node
2019-12-10 08:23:10 +08:00
ae350_64.dts
riscv: dts: Add #address-cells and #size-cells in nor node
2019-12-10 08:23:10 +08:00
fu540-c000-u-boot.dtsi
riscv: sifive: dts: fu540: Add board -u-boot.dtsi files
2020-06-04 09:44:08 +08:00
fu540-c000.dtsi
riscv: dts: Add hifive-unleashed-a00 dts from Linux
2019-12-10 08:23:10 +08:00
fu540-hifive-unleashed-a00-ddr.dtsi
sifive: dts: fu540: Add DDR controller and phy register settings
2020-06-04 09:44:08 +08:00
hifive-unleashed-a00-u-boot.dtsi
riscv: sifive: dts: fu540: Add board -u-boot.dtsi files
2020-06-04 09:44:08 +08:00
hifive-unleashed-a00.dts
riscv: dts: Add hifive-unleashed-a00 dts from Linux
2019-12-10 08:23:10 +08:00
Makefile
riscv: dts: Add hifive-unleashed-a00 dts from Linux
2019-12-10 08:23:10 +08:00