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8e2615752e
gd->bd->bi_baudrate is a copy of gd->baudrate. Since baudrate is a common feature for all architectures, keep gd->baudrate only. It is true that bi_baudrate was passed to the kernel in that structure but it was a long time ago. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Cc: Tom Rini <trini@ti.com> Cc: Simon Glass <sjg@chromium.org> Cc: Wolfgang Denk <wd@denx.de> Cc: Heiko Schocher <hs@denx.de> Acked-by: Michal Simek <monstr@monstr.eu> (For microblaze)
148 lines
3.3 KiB
C
148 lines
3.3 KiB
C
/*
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* (C) Copyright 2003, Psyent Corporation <www.psyent.com>
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* Scott McNutt <smcnutt@psyent.com>
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*
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* (C) Copyright 2000-2002
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* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <common.h>
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#include <stdio_dev.h>
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#include <watchdog.h>
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#include <malloc.h>
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#include <mmc.h>
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#include <net.h>
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#ifdef CONFIG_STATUS_LED
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#include <status_led.h>
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#endif
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#if defined(CONFIG_SYS_NIOS_EPCSBASE)
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#include <nios2-epcs.h>
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#endif
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#ifdef CONFIG_CMD_NAND
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#include <nand.h> /* cannot even include nand.h if it isnt configured */
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#endif
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DECLARE_GLOBAL_DATA_PTR;
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/*
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* All attempts to come up with a "common" initialization sequence
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* that works for all boards and architectures failed: some of the
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* requirements are just _too_ different. To get rid of the resulting
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* mess of board dependend #ifdef'ed code we now make the whole
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* initialization sequence configurable to the user.
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*
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* The requirements for any new initalization function is simple: it
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* receives a pointer to the "global data" structure as it's only
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* argument, and returns an integer return code, where 0 means
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* "continue" and != 0 means "fatal error, hang the system".
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*/
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typedef int (init_fnc_t) (void);
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/************************************************************************
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* Initialization sequence *
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***********************************************************************/
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init_fnc_t *init_sequence[] = {
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#if defined(CONFIG_BOARD_EARLY_INIT_F)
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board_early_init_f, /* Call board-specific init code early.*/
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#endif
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#if defined(CONFIG_SYS_NIOS_EPCSBASE)
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epcs_reset,
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#endif
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env_init,
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serial_init,
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console_init_f,
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display_options,
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checkcpu,
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checkboard,
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NULL, /* Terminate this list */
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};
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/***********************************************************************/
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void board_init(void)
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{
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bd_t *bd;
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init_fnc_t **init_fnc_ptr;
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static gd_t gd_data;
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static bd_t bd_data;
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/* Pointer is writable since we allocated a register for it. */
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gd = &gd_data;
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/* compiler optimization barrier needed for GCC >= 3.4 */
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__asm__ __volatile__("" : : : "memory");
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gd->bd = &bd_data;
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gd->baudrate = CONFIG_BAUDRATE;
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gd->cpu_clk = CONFIG_SYS_CLK_FREQ;
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bd = gd->bd;
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bd->bi_memstart = CONFIG_SYS_SDRAM_BASE;
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bd->bi_memsize = CONFIG_SYS_SDRAM_SIZE;
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#ifndef CONFIG_SYS_NO_FLASH
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bd->bi_flashstart = CONFIG_SYS_FLASH_BASE;
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#endif
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#if defined(CONFIG_SYS_SRAM_BASE) && defined(CONFIG_SYS_SRAM_SIZE)
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bd->bi_sramstart = CONFIG_SYS_SRAM_BASE;
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bd->bi_sramsize = CONFIG_SYS_SRAM_SIZE;
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#endif
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for (init_fnc_ptr = init_sequence; *init_fnc_ptr; ++init_fnc_ptr) {
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WATCHDOG_RESET();
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if ((*init_fnc_ptr) () != 0)
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hang();
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}
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WATCHDOG_RESET();
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/* The Malloc area is immediately below the monitor copy in RAM */
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mem_malloc_init(CONFIG_SYS_MALLOC_BASE, CONFIG_SYS_MALLOC_LEN);
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#ifndef CONFIG_SYS_NO_FLASH
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WATCHDOG_RESET();
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bd->bi_flashsize = flash_init();
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#endif
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#ifdef CONFIG_CMD_NAND
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puts("NAND: ");
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nand_init();
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#endif
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#ifdef CONFIG_GENERIC_MMC
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puts("MMC: ");
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mmc_initialize(bd);
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#endif
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WATCHDOG_RESET();
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env_relocate();
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WATCHDOG_RESET();
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stdio_init();
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jumptable_init();
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console_init_r();
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WATCHDOG_RESET();
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interrupt_init();
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#if defined(CONFIG_BOARD_LATE_INIT)
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board_late_init();
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#endif
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#if defined(CONFIG_CMD_NET)
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puts("Net: ");
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eth_initialize(bd);
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#endif
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/* main_loop */
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for (;;) {
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WATCHDOG_RESET();
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main_loop();
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}
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}
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