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	Move al mpc83xx fields into arch_global_data and tidy up. Also indent the nested #ifdef for clarity. Signed-off-by: Simon Glass <sjg@chromium.org>
		
			
				
	
	
		
			147 lines
		
	
	
		
			4.3 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			147 lines
		
	
	
		
			4.3 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
/*
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 * Copyright 2007 Freescale Semiconductor, Inc.
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 *
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 * (C) Copyright 2000
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 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
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 *
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 * See file CREDITS for list of people who contributed to this
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 * project.
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 *
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 * This program is free software; you can redistribute it and/or
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 * modify it under the terms of the GNU General Public License as
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 * published by the Free Software Foundation; either version 2 of
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 * the License, or (at your option) any later version.
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 *
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 * This program is distributed in the hope that it will be useful,
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 * but WITHOUT ANY WARRANTY; without even the implied warranty of
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 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
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 * GNU General Public License for more details.
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 *
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 * You should have received a copy of the GNU General Public License
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 * along with this program; if not, write to the Free Software
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 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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 * MA 02111-1307 USA
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 */
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#include <common.h>
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#include <libfdt.h>
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#include <fdt_support.h>
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#include <asm/processor.h>
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extern void ft_qe_setup(void *blob);
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DECLARE_GLOBAL_DATA_PTR;
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#if defined(CONFIG_BOOTCOUNT_LIMIT) && \
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	(defined(CONFIG_QE))
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#include <asm/immap_qe.h>
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void fdt_fixup_muram (void *blob)
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{
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	ulong data[2];
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	data[0] = 0;
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	data[1] = QE_MURAM_SIZE - 2 * sizeof(unsigned long);
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	do_fixup_by_compat(blob, "fsl,qe-muram-data", "reg",
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			data, sizeof (data), 0);
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}
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#endif
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void ft_cpu_setup(void *blob, bd_t *bd)
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{
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	immap_t *immr = (immap_t *)CONFIG_SYS_IMMR;
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	int spridr = immr->sysconf.spridr;
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	/*
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	 * delete crypto node if not on an E-processor
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	 * initial revisions of the MPC834xE/6xE have the original SEC 2.0.
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	 * EA revisions got the SEC uprevved to 2.4 but since the default device
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	 * tree contains SEC 2.0 properties we uprev them here.
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	 */
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	if (!IS_E_PROCESSOR(spridr))
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		fdt_fixup_crypto_node(blob, 0);
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	else if (IS_E_PROCESSOR(spridr) &&
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		 (SPR_FAMILY(spridr) == SPR_834X_FAMILY ||
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		  SPR_FAMILY(spridr) == SPR_836X_FAMILY) &&
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		 REVID_MAJOR(spridr) >= 2)
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		fdt_fixup_crypto_node(blob, 0x0204);
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#if defined(CONFIG_HAS_ETH0) || defined(CONFIG_HAS_ETH1) ||\
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    defined(CONFIG_HAS_ETH2) || defined(CONFIG_HAS_ETH3) ||\
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    defined(CONFIG_HAS_ETH4) || defined(CONFIG_HAS_ETH5)
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	fdt_fixup_ethernet(blob);
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#ifdef CONFIG_MPC8313
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	/*
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	* mpc8313e erratum IPIC1 swapped TSEC interrupt ID numbers on rev. 1
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	* h/w (see AN3545).  The base device tree in use has rev. 1 ID numbers,
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	* so if on Rev. 2 (and higher) h/w, we fix them up here
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	*/
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	if (REVID_MAJOR(immr->sysconf.spridr) >= 2) {
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		int nodeoffset, path;
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		const char *prop;
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		nodeoffset = fdt_path_offset(blob, "/aliases");
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		if (nodeoffset >= 0) {
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#if defined(CONFIG_HAS_ETH0)
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			prop = fdt_getprop(blob, nodeoffset, "ethernet0", NULL);
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			if (prop) {
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				u32 tmp[] = { 32, 0x8, 33, 0x8, 34, 0x8 };
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				path = fdt_path_offset(blob, prop);
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				prop = fdt_getprop(blob, path, "interrupts",
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						   NULL);
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				if (prop)
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					fdt_setprop(blob, path, "interrupts",
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						    &tmp, sizeof(tmp));
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			}
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#endif
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#if defined(CONFIG_HAS_ETH1)
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			prop = fdt_getprop(blob, nodeoffset, "ethernet1", NULL);
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			if (prop) {
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				u32 tmp[] = { 35, 0x8, 36, 0x8, 37, 0x8 };
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				path = fdt_path_offset(blob, prop);
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				prop = fdt_getprop(blob, path, "interrupts",
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						   NULL);
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				if (prop)
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					fdt_setprop(blob, path, "interrupts",
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						    &tmp, sizeof(tmp));
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			}
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#endif
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		}
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	}
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#endif
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#endif
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	do_fixup_by_prop_u32(blob, "device_type", "cpu", 4,
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		"timebase-frequency", (bd->bi_busfreq / 4), 1);
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	do_fixup_by_prop_u32(blob, "device_type", "cpu", 4,
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		"bus-frequency", bd->bi_busfreq, 1);
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	do_fixup_by_prop_u32(blob, "device_type", "cpu", 4,
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		"clock-frequency", gd->arch.core_clk, 1);
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	do_fixup_by_prop_u32(blob, "device_type", "soc", 4,
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		"bus-frequency", bd->bi_busfreq, 1);
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	do_fixup_by_compat_u32(blob, "fsl,soc",
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		"bus-frequency", bd->bi_busfreq, 1);
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	do_fixup_by_compat_u32(blob, "fsl,soc",
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		"clock-frequency", bd->bi_busfreq, 1);
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	do_fixup_by_compat_u32(blob, "fsl,immr",
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		"bus-frequency", bd->bi_busfreq, 1);
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	do_fixup_by_compat_u32(blob, "fsl,immr",
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		"clock-frequency", bd->bi_busfreq, 1);
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#ifdef CONFIG_QE
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	ft_qe_setup(blob);
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#endif
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#ifdef CONFIG_SYS_NS16550
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	do_fixup_by_compat_u32(blob, "ns16550",
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		"clock-frequency", CONFIG_SYS_NS16550_CLK, 1);
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#endif
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	fdt_fixup_memory(blob, (u64)bd->bi_memstart, (u64)bd->bi_memsize);
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#if defined(CONFIG_BOOTCOUNT_LIMIT)
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	fdt_fixup_muram (blob);
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#endif
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}
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