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9c2969e92c
lx2160a rev1 requires layerscape_gen4 device tree fixup and lx2160a rev2 requires layerscape device tree fixup. Add device tree fixup for lx2160a based on SoC and Version. Signed-off-by: Wasim Khan <wasim.khan@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
125 lines
3.0 KiB
C
125 lines
3.0 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright 2019-2020 NXP
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*
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* PCIe DT fixup for NXP Layerscape SoCs
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* Author: Wasim Khan <wasim.khan@nxp.com>
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*
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*/
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#include <common.h>
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#include <asm/arch/clock.h>
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#include <asm/arch/soc.h>
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#include "pcie_layerscape_fixup_common.h"
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void ft_pci_setup(void *blob, bd_t *bd)
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{
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#if defined(CONFIG_PCIE_LAYERSCAPE_GEN4)
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uint svr;
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svr = SVR_SOC_VER(get_svr());
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if (svr == SVR_LX2160A && IS_SVR_REV(get_svr(), 1, 0))
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ft_pci_setup_ls_gen4(blob, bd);
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else
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#endif /* CONFIG_PCIE_LAYERSCAPE_GEN4 */
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ft_pci_setup_ls(blob, bd);
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}
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#if defined(CONFIG_FSL_LAYERSCAPE)
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int lx2_board_fix_fdt(void *fdt)
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{
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char *reg_name, *old_str, *new_str;
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const char *reg_names;
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int names_len, old_str_len, new_str_len, remaining_str_len;
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struct str_map {
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char *old_str;
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char *new_str;
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} reg_names_map[] = {
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{ "csr_axi_slave", "regs" },
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{ "config_axi_slave", "config" }
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};
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int off = -1, i;
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off = fdt_node_offset_by_compatible(fdt, -1, "fsl,lx2160a-pcie");
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while (off != -FDT_ERR_NOTFOUND) {
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fdt_setprop(fdt, off, "compatible", "fsl,ls2088a-pcie",
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strlen("fsl,ls2088a-pcie") + 1);
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reg_names = fdt_getprop(fdt, off, "reg-names", &names_len);
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if (!reg_names)
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continue;
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reg_name = (char *)reg_names;
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remaining_str_len = names_len - (reg_name - reg_names);
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i = 0;
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while ((i < ARRAY_SIZE(reg_names_map)) && remaining_str_len) {
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old_str = reg_names_map[i].old_str;
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new_str = reg_names_map[i].new_str;
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old_str_len = strlen(old_str);
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new_str_len = strlen(new_str);
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if (memcmp(reg_name, old_str, old_str_len) == 0) {
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/* first only leave required bytes for new_str
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* and copy rest of the string after it
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*/
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memcpy(reg_name + new_str_len,
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reg_name + old_str_len,
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remaining_str_len - old_str_len);
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/* Now copy new_str */
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memcpy(reg_name, new_str, new_str_len);
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names_len -= old_str_len;
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names_len += new_str_len;
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i++;
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}
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reg_name = memchr(reg_name, '\0', remaining_str_len);
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if (!reg_name)
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break;
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reg_name += 1;
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remaining_str_len = names_len - (reg_name - reg_names);
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}
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fdt_setprop(fdt, off, "reg-names", reg_names, names_len);
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fdt_delprop(fdt, off, "apio-wins");
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fdt_delprop(fdt, off, "ppio-wins");
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off = fdt_node_offset_by_compatible(fdt, off,
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"fsl,lx2160a-pcie");
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}
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return 0;
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}
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int pcie_board_fix_fdt(void *fdt)
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{
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uint svr;
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svr = SVR_SOC_VER(get_svr());
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if (svr == SVR_LX2160A && IS_SVR_REV(get_svr(), 2, 0))
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return lx2_board_fix_fdt(fdt);
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return 0;
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}
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#ifdef CONFIG_ARCH_LX2160A
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/* returns the next available streamid for pcie, -errno if failed */
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int pcie_next_streamid(int currentid, int idx)
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{
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if (currentid > FSL_PEX_STREAM_ID_END)
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return -EINVAL;
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return currentid | ((idx + 1) << 11);
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}
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#else
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/* returns the next available streamid for pcie, -errno if failed */
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int pcie_next_streamid(int currentid, int idx)
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{
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static int next_stream_id = FSL_PEX_STREAM_ID_START;
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if (next_stream_id > FSL_PEX_STREAM_ID_END)
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return -EINVAL;
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return next_stream_id++;
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}
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#endif
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#endif /* CONFIG_FSL_LAYERSCAPE */
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