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	In order to support Ethernet boot on AM64x, probe AM65 CPSW NUSS. Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
		
			
				
	
	
		
			368 lines
		
	
	
		
			8.6 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			368 lines
		
	
	
		
			8.6 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
| // SPDX-License-Identifier: GPL-2.0
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| /*
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|  * AM642: SoC specific initialization
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|  *
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|  * Copyright (C) 2020-2021 Texas Instruments Incorporated - https://www.ti.com/
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|  *	Keerthy <j-keerthy@ti.com>
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|  *	Dave Gerlach <d-gerlach@ti.com>
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|  */
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| 
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| #include <common.h>
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| #include <fdt_support.h>
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| #include <spl.h>
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| #include <asm/io.h>
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| #include <asm/arch/hardware.h>
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| #include <asm/arch/sysfw-loader.h>
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| #include <asm/arch/sys_proto.h>
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| #include "common.h"
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| #include <asm/arch/sys_proto.h>
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| #include <linux/soc/ti/ti_sci_protocol.h>
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| #include <dm.h>
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| #include <dm/uclass-internal.h>
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| #include <dm/pinctrl.h>
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| #include <mmc.h>
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| #include <dm/root.h>
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| 
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| #if defined(CONFIG_SPL_BUILD)
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| 
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| static void ctrl_mmr_unlock(void)
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| {
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| 	/* Unlock all PADCFG_MMR1 module registers */
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| 	mmr_unlock(PADCFG_MMR1_BASE, 1);
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| 
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| 	/* Unlock all CTRL_MMR0 module registers */
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| 	mmr_unlock(CTRL_MMR0_BASE, 0);
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| 	mmr_unlock(CTRL_MMR0_BASE, 1);
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| 	mmr_unlock(CTRL_MMR0_BASE, 2);
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| 	mmr_unlock(CTRL_MMR0_BASE, 3);
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| 	mmr_unlock(CTRL_MMR0_BASE, 5);
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| 	mmr_unlock(CTRL_MMR0_BASE, 6);
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| 
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| 	/* Unlock all MCU_PADCFG_MMR1 module registers */
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| 	mmr_unlock(MCU_PADCFG_MMR1_BASE, 1);
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| }
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| 
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| /*
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|  * This uninitialized global variable would normal end up in the .bss section,
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|  * but the .bss is cleared between writing and reading this variable, so move
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|  * it to the .data section.
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|  */
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| u32 bootindex __section(".data");
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| static struct rom_extended_boot_data bootdata __section(".data");
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| 
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| static void store_boot_info_from_rom(void)
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| {
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| 	bootindex = *(u32 *)(CONFIG_SYS_K3_BOOT_PARAM_TABLE_INDEX);
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| 	memcpy(&bootdata, (uintptr_t *)ROM_ENTENDED_BOOT_DATA_INFO,
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| 	       sizeof(struct rom_extended_boot_data));
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| }
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| 
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| #if defined(CONFIG_K3_LOAD_SYSFW) && CONFIG_IS_ENABLED(DM_MMC)
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| void k3_mmc_stop_clock(void)
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| {
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| 	if (spl_boot_device() == BOOT_DEVICE_MMC1) {
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| 		struct mmc *mmc = find_mmc_device(0);
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| 
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| 		if (!mmc)
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| 			return;
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| 
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| 		mmc->saved_clock = mmc->clock;
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| 		mmc_set_clock(mmc, 0, true);
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| 	}
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| }
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| 
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| void k3_mmc_restart_clock(void)
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| {
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| 	if (spl_boot_device() == BOOT_DEVICE_MMC1) {
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| 		struct mmc *mmc = find_mmc_device(0);
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| 
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| 		if (!mmc)
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| 			return;
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| 
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| 		mmc_set_clock(mmc, mmc->saved_clock, false);
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| 	}
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| }
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| #else
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| void k3_mmc_stop_clock(void) {}
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| void k3_mmc_restart_clock(void) {}
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| #endif
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| 
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| #ifdef CONFIG_SPL_OF_LIST
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| void do_dt_magic(void)
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| {
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| 	int ret, rescan;
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| 
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| 	if (IS_ENABLED(CONFIG_TI_I2C_BOARD_DETECT))
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| 		do_board_detect();
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| 
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| 	/*
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| 	 * Board detection has been done.
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| 	 * Let us see if another dtb wouldn't be a better match
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| 	 * for our board
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| 	 */
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| 	if (IS_ENABLED(CONFIG_CPU_V7R)) {
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| 		ret = fdtdec_resetup(&rescan);
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| 		if (!ret && rescan) {
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| 			dm_uninit();
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| 			dm_init_and_scan(true);
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| 		}
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| 	}
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| }
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| #endif
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| 
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| #if CONFIG_IS_ENABLED(USB_STORAGE)
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| static int fixup_usb_boot(const void *fdt_blob)
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| {
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| 	int ret = 0;
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| 
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| 	switch (spl_boot_device()) {
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| 	case BOOT_DEVICE_USB:
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| 		/*
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| 		 * If the boot mode is host, fixup the dr_mode to host
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| 		 * before cdns3 bind takes place
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| 		 */
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| 		ret = fdt_find_and_setprop((void *)fdt_blob,
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| 					   "/bus@f4000/cdns-usb@f900000/usb@f400000",
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| 					   "dr_mode", "host", 5, 0);
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| 		if (ret)
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| 			printf("%s: fdt_find_and_setprop() failed:%d\n",
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| 			       __func__, ret);
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| 		fallthrough;
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| 	default:
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| 		break;
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| 	}
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| 
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| 	return ret;
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| }
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| 
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| int fdtdec_board_setup(const void *fdt_blob)
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| {
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| 	/* Can use the pointer from the function parameters */
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| 	return fixup_usb_boot(fdt_blob);
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| }
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| #endif
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| 
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| void board_init_f(ulong dummy)
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| {
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| #if defined(CONFIG_K3_LOAD_SYSFW) || defined(CONFIG_K3_AM64_DDRSS)
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| 	struct udevice *dev;
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| 	int ret;
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| #endif
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| 
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| #if defined(CONFIG_CPU_V7R)
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| 	setup_k3_mpu_regions();
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| #endif
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| 
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| 	/*
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| 	 * Cannot delay this further as there is a chance that
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| 	 * K3_BOOT_PARAM_TABLE_INDEX can be over written by SPL MALLOC section.
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| 	 */
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| 	store_boot_info_from_rom();
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| 
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| 	ctrl_mmr_unlock();
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| 
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| 	/* Init DM early */
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| 	spl_early_init();
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| 
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| 	preloader_console_init();
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| 
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| 	do_dt_magic();
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| 
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| #if defined(CONFIG_K3_LOAD_SYSFW)
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| 	/*
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| 	 * Process pinctrl for serial3 a.k.a. MAIN UART1 module and continue
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| 	 * regardless of the result of pinctrl. Do this without probing the
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| 	 * device, but instead by searching the device that would request the
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| 	 * given sequence number if probed. The UART will be used by the system
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| 	 * firmware (SYSFW) image for various purposes and SYSFW depends on us
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| 	 * to initialize its pin settings.
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| 	 */
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| 	ret = uclass_find_device_by_seq(UCLASS_SERIAL, 3, &dev);
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| 	if (!ret)
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| 		pinctrl_select_state(dev, "default");
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| 
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| 	/*
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| 	 * Load, start up, and configure system controller firmware.
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| 	 * This will determine whether or not ROM has already loaded
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| 	 * system firmware and if so, will only perform needed config
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| 	 * and not attempt to load firmware again.
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| 	 */
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| 	k3_sysfw_loader(is_rom_loaded_sysfw(&bootdata), k3_mmc_stop_clock,
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| 			k3_mmc_restart_clock);
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| #endif
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| 
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| 	/* Output System Firmware version info */
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| 	k3_sysfw_print_ver();
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| 
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| #if defined(CONFIG_K3_AM64_DDRSS)
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| 	ret = uclass_get_device(UCLASS_RAM, 0, &dev);
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| 	if (ret)
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| 		panic("DRAM init failed: %d\n", ret);
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| #endif
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| 	if (IS_ENABLED(CONFIG_SPL_ETH) && IS_ENABLED(CONFIG_TI_AM65_CPSW_NUSS) &&
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| 	    spl_boot_device() == BOOT_DEVICE_ETHERNET) {
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| 		struct udevice *cpswdev;
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| 
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| 		if (uclass_get_device_by_driver(UCLASS_MISC, DM_DRIVER_GET(am65_cpsw_nuss), &cpswdev))
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| 			printf("Failed to probe am65_cpsw_nuss driver\n");
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| 	}
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| }
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| 
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| u32 spl_mmc_boot_mode(const u32 boot_device)
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| {
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| 	switch (boot_device) {
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| 	case BOOT_DEVICE_MMC1:
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| 		return MMCSD_MODE_EMMCBOOT;
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| 
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| 	case BOOT_DEVICE_MMC2:
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| 		return MMCSD_MODE_FS;
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| 
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| 	default:
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| 		return MMCSD_MODE_RAW;
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| 	}
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| }
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| 
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| static u32 __get_backup_bootmedia(u32 main_devstat)
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| {
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| 	u32 bkup_bootmode =
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| 	    (main_devstat & MAIN_DEVSTAT_BACKUP_BOOTMODE_MASK) >>
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| 	    MAIN_DEVSTAT_BACKUP_BOOTMODE_SHIFT;
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| 	u32 bkup_bootmode_cfg =
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| 	    (main_devstat & MAIN_DEVSTAT_BACKUP_BOOTMODE_CFG_MASK) >>
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| 	    MAIN_DEVSTAT_BACKUP_BOOTMODE_CFG_SHIFT;
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| 
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| 	switch (bkup_bootmode) {
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| 	case BACKUP_BOOT_DEVICE_UART:
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| 		return BOOT_DEVICE_UART;
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| 
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| 	case BACKUP_BOOT_DEVICE_DFU:
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| 		if (bkup_bootmode_cfg & MAIN_DEVSTAT_BACKUP_USB_MODE_MASK)
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| 			return BOOT_DEVICE_USB;
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| 		return BOOT_DEVICE_DFU;
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| 
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| 
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| 	case BACKUP_BOOT_DEVICE_ETHERNET:
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| 		return BOOT_DEVICE_ETHERNET;
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| 
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| 	case BACKUP_BOOT_DEVICE_MMC:
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| 		if (bkup_bootmode_cfg)
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| 			return BOOT_DEVICE_MMC2;
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| 		return BOOT_DEVICE_MMC1;
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| 
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| 	case BACKUP_BOOT_DEVICE_SPI:
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| 		return BOOT_DEVICE_SPI;
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| 
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| 	case BACKUP_BOOT_DEVICE_I2C:
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| 		return BOOT_DEVICE_I2C;
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| 	};
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| 
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| 	return BOOT_DEVICE_RAM;
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| }
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| 
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| static u32 __get_primary_bootmedia(u32 main_devstat)
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| {
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| 	u32 bootmode = (main_devstat & MAIN_DEVSTAT_PRIMARY_BOOTMODE_MASK) >>
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| 	    MAIN_DEVSTAT_PRIMARY_BOOTMODE_SHIFT;
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| 	u32 bootmode_cfg =
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| 	    (main_devstat & MAIN_DEVSTAT_PRIMARY_BOOTMODE_CFG_MASK) >>
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| 	    MAIN_DEVSTAT_PRIMARY_BOOTMODE_CFG_SHIFT;
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| 
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| 	switch (bootmode) {
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| 	case BOOT_DEVICE_OSPI:
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| 		fallthrough;
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| 	case BOOT_DEVICE_QSPI:
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| 		fallthrough;
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| 	case BOOT_DEVICE_XSPI:
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| 		fallthrough;
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| 	case BOOT_DEVICE_SPI:
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| 		return BOOT_DEVICE_SPI;
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| 
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| 	case BOOT_DEVICE_ETHERNET_RGMII:
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| 		fallthrough;
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| 	case BOOT_DEVICE_ETHERNET_RMII:
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| 		return BOOT_DEVICE_ETHERNET;
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| 
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| 	case BOOT_DEVICE_EMMC:
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| 		return BOOT_DEVICE_MMC1;
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| 
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| 	case BOOT_DEVICE_MMC:
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| 		if ((bootmode_cfg & MAIN_DEVSTAT_PRIMARY_MMC_PORT_MASK) >>
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| 		     MAIN_DEVSTAT_PRIMARY_MMC_PORT_SHIFT)
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| 			return BOOT_DEVICE_MMC2;
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| 		return BOOT_DEVICE_MMC1;
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| 
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| 	case BOOT_DEVICE_DFU:
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| 		if ((bootmode_cfg & MAIN_DEVSTAT_PRIMARY_USB_MODE_MASK) >>
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| 		    MAIN_DEVSTAT_PRIMARY_USB_MODE_SHIFT)
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| 			return BOOT_DEVICE_USB;
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| 		return BOOT_DEVICE_DFU;
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| 
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| 	case BOOT_DEVICE_NOBOOT:
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| 		return BOOT_DEVICE_RAM;
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| 	}
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| 
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| 	return bootmode;
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| }
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| 
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| u32 spl_boot_device(void)
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| {
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| 	u32 devstat = readl(CTRLMMR_MAIN_DEVSTAT);
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| 
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| 	if (bootindex == K3_PRIMARY_BOOTMODE)
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| 		return __get_primary_bootmedia(devstat);
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| 	else
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| 		return __get_backup_bootmedia(devstat);
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| }
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| #endif
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| 
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| #if defined(CONFIG_SYS_K3_SPL_ATF)
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| 
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| #define AM64X_DEV_RTI8			127
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| #define AM64X_DEV_RTI9			128
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| #define AM64X_DEV_R5FSS0_CORE0		121
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| #define AM64X_DEV_R5FSS0_CORE1		122
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| 
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| void release_resources_for_core_shutdown(void)
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| {
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| 	struct ti_sci_handle *ti_sci = get_ti_sci_handle();
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| 	struct ti_sci_dev_ops *dev_ops = &ti_sci->ops.dev_ops;
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| 	struct ti_sci_proc_ops *proc_ops = &ti_sci->ops.proc_ops;
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| 	int ret;
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| 	u32 i;
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| 
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| 	const u32 put_device_ids[] = {
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| 		AM64X_DEV_RTI9,
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| 		AM64X_DEV_RTI8,
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| 	};
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| 
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| 	/* Iterate through list of devices to put (shutdown) */
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| 	for (i = 0; i < ARRAY_SIZE(put_device_ids); i++) {
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| 		u32 id = put_device_ids[i];
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| 
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| 		ret = dev_ops->put_device(ti_sci, id);
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| 		if (ret)
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| 			panic("Failed to put device %u (%d)\n", id, ret);
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| 	}
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| 
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| 	const u32 put_core_ids[] = {
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| 		AM64X_DEV_R5FSS0_CORE1,
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| 		AM64X_DEV_R5FSS0_CORE0, /* Handle CPU0 after CPU1 */
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| 	};
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| 
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| 	/* Iterate through list of cores to put (shutdown) */
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| 	for (i = 0; i < ARRAY_SIZE(put_core_ids); i++) {
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| 		u32 id = put_core_ids[i];
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| 
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| 		/*
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| 		 * Queue up the core shutdown request. Note that this call
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| 		 * needs to be followed up by an actual invocation of an WFE
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| 		 * or WFI CPU instruction.
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| 		 */
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| 		ret = proc_ops->proc_shutdown_no_wait(ti_sci, id);
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| 		if (ret)
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| 			panic("Failed sending core %u shutdown message (%d)\n",
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| 			      id, ret);
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| 	}
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| }
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| #endif
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