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			185 lines
		
	
	
		
			6.9 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			185 lines
		
	
	
		
			6.9 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
/*
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 * (C) Copyright 2001
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 * Denis Peter, MPL AG Switzerland
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 *
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 * See file CREDITS for list of people who contributed to this
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 * project.
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 *
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 * This program is free software; you can redistribute it and/or
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 * modify it under the terms of the GNU General Public License as
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 * published by the Free Software Foundation; either version 2 of
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 * the License, or (at your option) any later version.
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 *
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 * This program is distributed in the hope that it will be useful,
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 * but WITHOUT ANY WARRANTY; without even the implied warranty of
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 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
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 * GNU General Public License for more details.
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 *
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 * You should have received a copy of the GNU General Public License
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 * along with this program; if not, write to the Free Software
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 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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 * MA 02111-1307 USA
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 *
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 * Note: Part of this code has been derived from linux
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 *
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 */
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#ifndef _USB_UHCI_H_
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#define _USB_UHCI_H_
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/* Command register */
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#define USBCMD		0
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#define   USBCMD_RS       0x0001	/* Run/Stop */
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#define   USBCMD_HCRESET  0x0002	/* Host reset */
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#define   USBCMD_GRESET   0x0004	/* Global reset */
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#define   USBCMD_EGSM     0x0008	/* Global Suspend Mode */
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#define   USBCMD_FGR      0x0010	/* Force Global Resume */
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#define   USBCMD_SWDBG    0x0020	/* SW Debug mode */
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#define   USBCMD_CF       0x0040	/* Config Flag (sw only) */
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#define   USBCMD_MAXP     0x0080	/* Max Packet (0 = 32, 1 = 64) */
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/* Status register */
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#define USBSTS		2
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#define   USBSTS_USBINT   0x0001	/* Interrupt due to IOC */
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#define   USBSTS_ERROR    0x0002	/* Interrupt due to error */
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#define   USBSTS_RD       0x0004	/* Resume Detect */
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#define   USBSTS_HSE      0x0008	/* Host System Error - basically PCI problems */
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#define   USBSTS_HCPE     0x0010	/* Host Controller Process Error - the scripts were buggy */
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#define   USBSTS_HCH      0x0020	/* HC Halted */
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/* Interrupt enable register */
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#define USBINTR		4
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#define   USBINTR_TIMEOUT 0x0001	/* Timeout/CRC error enable */
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#define   USBINTR_RESUME  0x0002	/* Resume interrupt enable */
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#define   USBINTR_IOC     0x0004	/* Interrupt On Complete enable */
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#define   USBINTR_SP      0x0008	/* Short packet interrupt enable */
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#define USBFRNUM      6
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#define USBFLBASEADD  8
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#define USBSOF        12
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/* USB port status and control registers */
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#define USBPORTSC1	16
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#define USBPORTSC2	18
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#define   USBPORTSC_CCS   0x0001	/* Current Connect Status ("device present") */
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#define   USBPORTSC_CSC   0x0002	/* Connect Status Change */
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#define   USBPORTSC_PE    0x0004	/* Port Enable */
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#define   USBPORTSC_PEC   0x0008	/* Port Enable Change */
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#define   USBPORTSC_LS    0x0030	/* Line Status */
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#define   USBPORTSC_RD    0x0040	/* Resume Detect */
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#define   USBPORTSC_LSDA  0x0100	/* Low Speed Device Attached */
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#define   USBPORTSC_PR    0x0200	/* Port Reset */
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#define   USBPORTSC_SUSP  0x1000	/* Suspend */
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/* Legacy support register */
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#define USBLEGSUP 0xc0
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#define USBLEGSUP_DEFAULT 0x2000	/* only PIRQ enable set */
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#define UHCI_NULL_DATA_SIZE 0x7ff	/* for UHCI controller TD */
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#define UHCI_PID            0xff	/* PID MASK */
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#define UHCI_PTR_BITS       0x000F
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#define UHCI_PTR_TERM       0x0001
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#define UHCI_PTR_QH         0x0002
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#define UHCI_PTR_DEPTH      0x0004
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/* for TD <status>: */
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#define TD_CTRL_SPD         (1 << 29)	/* Short Packet Detect */
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#define TD_CTRL_C_ERR_MASK  (3 << 27)	/* Error Counter bits */
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#define TD_CTRL_LS          (1 << 26)	/* Low Speed Device */
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#define TD_CTRL_IOS         (1 << 25)	/* Isochronous Select */
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#define TD_CTRL_IOC         (1 << 24)	/* Interrupt on Complete */
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#define TD_CTRL_ACTIVE      (1 << 23)	/* TD Active */
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#define TD_CTRL_STALLED     (1 << 22)	/* TD Stalled */
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#define TD_CTRL_DBUFERR     (1 << 21)	/* Data Buffer Error */
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#define TD_CTRL_BABBLE      (1 << 20)	/* Babble Detected */
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#define TD_CTRL_NAK         (1 << 19)	/* NAK Received */
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#define TD_CTRL_CRCTIMEO    (1 << 18)	/* CRC/Time Out Error */
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#define TD_CTRL_BITSTUFF    (1 << 17)	/* Bit Stuff Error */
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#define TD_CTRL_ACTLEN_MASK 0x7ff	/* actual length, encoded as n - 1 */
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#define TD_CTRL_ANY_ERROR	(TD_CTRL_STALLED | TD_CTRL_DBUFERR | \
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				 TD_CTRL_BABBLE | TD_CTRL_CRCTIME | TD_CTRL_BITSTUFF)
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#define TD_TOKEN_TOGGLE		19
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/* ------------------------------------------------------------------------------------
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   Virtual Root HUB
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   ------------------------------------------------------------------------------------ */
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/* destination of request */
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#define RH_INTERFACE               0x01
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#define RH_ENDPOINT                0x02
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#define RH_OTHER                   0x03
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#define RH_CLASS                   0x20
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#define RH_VENDOR                  0x40
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/* Requests: bRequest << 8 | bmRequestType */
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#define RH_GET_STATUS           0x0080
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#define RH_CLEAR_FEATURE        0x0100
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#define RH_SET_FEATURE          0x0300
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#define RH_SET_ADDRESS          0x0500
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#define RH_GET_DESCRIPTOR       0x0680
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#define RH_SET_DESCRIPTOR       0x0700
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#define RH_GET_CONFIGURATION    0x0880
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#define RH_SET_CONFIGURATION    0x0900
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#define RH_GET_STATE            0x0280
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#define RH_GET_INTERFACE        0x0A80
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#define RH_SET_INTERFACE        0x0B00
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#define RH_SYNC_FRAME           0x0C80
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/* Our Vendor Specific Request */
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#define RH_SET_EP               0x2000
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/* Hub port features */
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#define RH_PORT_CONNECTION         0x00
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#define RH_PORT_ENABLE             0x01
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#define RH_PORT_SUSPEND            0x02
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#define RH_PORT_OVER_CURRENT       0x03
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#define RH_PORT_RESET              0x04
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#define RH_PORT_POWER              0x08
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#define RH_PORT_LOW_SPEED          0x09
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#define RH_C_PORT_CONNECTION       0x10
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#define RH_C_PORT_ENABLE           0x11
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#define RH_C_PORT_SUSPEND          0x12
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#define RH_C_PORT_OVER_CURRENT     0x13
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#define RH_C_PORT_RESET            0x14
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/* Hub features */
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#define RH_C_HUB_LOCAL_POWER       0x00
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#define RH_C_HUB_OVER_CURRENT      0x01
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#define RH_DEVICE_REMOTE_WAKEUP    0x00
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#define RH_ENDPOINT_STALL          0x01
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/* Our Vendor Specific feature */
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#define RH_REMOVE_EP               0x00
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#define RH_ACK                     0x01
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#define RH_REQ_ERR                 -1
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#define RH_NACK                    0x00
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/* Transfer descriptor structure */
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typedef struct {
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	unsigned long link;	/* next td/qh (LE) */
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	unsigned long status;	/* status of the td */
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	unsigned long info;	/* Max Lenght / Endpoint / device address and PID */
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	unsigned long buffer;	/* pointer to data buffer (LE) */
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	unsigned long dev_ptr;	/* pointer to the assigned device (BE) */
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	unsigned long res[3];	/* reserved (TDs must be 8Byte aligned) */
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} uhci_td_t, *puhci_td_t;
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/* Queue Header structure */
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typedef struct {
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	unsigned long head;	/* Next QH (LE) */
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	unsigned long element;	/* Queue element pointer (LE) */
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	unsigned long res[5];	/* reserved */
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	unsigned long dev_ptr;	/* if 0 no tds have been assigned to this qh */
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} uhci_qh_t, *puhci_qh_t;
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struct virt_root_hub {
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	int devnum;		/* Address of Root Hub endpoint */
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	int numports;		/* number of ports */
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	int c_p_r[8];		/* C_PORT_RESET */
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};
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#endif				/* _USB_UHCI_H_ */
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