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	This commit gets rid of a huge amount of silly white-space issues. Especially, all sequences of SPACEs followed by TAB characters get removed (unless they appear in print statements). Also remove all embedded "vim:" and "vi:" statements which hide indentation problems. Signed-off-by: Wolfgang Denk <wd@denx.de>
		
			
				
	
	
		
			157 lines
		
	
	
		
			4.0 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			157 lines
		
	
	
		
			4.0 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
| /*
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|  * National Semiconductor DP83848 PHY Driver for TI DaVinci
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|  * (TMS320DM644x) based boards.
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|  *
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|  * Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net>
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|  *
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|  * --------------------------------------------------------
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|  *
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|  * See file CREDITS for list of people who contributed to this
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|  * project.
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|  *
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|  * This program is free software; you can redistribute it and/or
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|  * modify it under the terms of the GNU General Public License as
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|  * published by the Free Software Foundation; either version 2 of
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|  * the License, or (at your option) any later version.
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|  *
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|  * This program is distributed in the hope that it will be useful,
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|  * but WITHOUT ANY WARRANTY; without even the implied warranty of
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|  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
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|  * GNU General Public License for more details.
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|  *
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|  * You should have received a copy of the GNU General Public License
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|  * along with this program; if not, write to the Free Software
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|  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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|  * MA 02111-1307 USA
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|  */
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| 
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| #include <common.h>
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| #include <net.h>
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| #include <dp83848.h>
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| #include <asm/arch/emac_defs.h>
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| 
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| #ifdef CONFIG_DRIVER_TI_EMAC
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| 
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| #ifdef CONFIG_CMD_NET
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| 
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| int dp83848_is_phy_connected(int phy_addr)
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| {
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| 	u_int16_t	id1, id2;
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| 
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| 	if (!dm644x_eth_phy_read(phy_addr, DP83848_PHYID1_REG, &id1))
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| 		return(0);
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| 	if (!dm644x_eth_phy_read(phy_addr, DP83848_PHYID2_REG, &id2))
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| 		return(0);
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| 
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| 	if ((id1 == DP83848_PHYID1_OUI) && (id2 == DP83848_PHYID2_OUI))
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| 		return(1);
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| 
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| 	return(0);
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| }
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| 
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| int dp83848_get_link_speed(int phy_addr)
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| {
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| 	u_int16_t		tmp;
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| 	volatile emac_regs*	emac = (emac_regs *)EMAC_BASE_ADDR;
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| 
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| 	if (!dm644x_eth_phy_read(phy_addr, DP83848_STAT_REG, &tmp))
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| 		return(0);
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| 
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| 	if (!(tmp & DP83848_LINK_STATUS))	/* link up? */
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| 		return(0);
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| 
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| 	if (!dm644x_eth_phy_read(phy_addr, DP83848_PHY_STAT_REG, &tmp))
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| 		return(0);
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| 
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| 	/* Speed doesn't matter, there is no setting for it in EMAC... */
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| 	if (tmp & DP83848_SPEED) {
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| 		if (tmp & DP83848_DUPLEX) {
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| 			/* set DM644x EMAC for Full Duplex  */
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| 			emac->MACCONTROL = EMAC_MACCONTROL_MIIEN_ENABLE | EMAC_MACCONTROL_FULLDUPLEX_ENABLE;
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| 		} else {
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| 			/*set DM644x EMAC for Half Duplex  */
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| 			emac->MACCONTROL = EMAC_MACCONTROL_MIIEN_ENABLE;
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| 		}
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| 
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| 		return(1);
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| 	} else {
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| 		if (tmp & DP83848_DUPLEX) {
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| 			/* set DM644x EMAC for Full Duplex  */
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| 			emac->MACCONTROL = EMAC_MACCONTROL_MIIEN_ENABLE | EMAC_MACCONTROL_FULLDUPLEX_ENABLE;
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| 		} else {
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| 			/*set DM644x EMAC for Half Duplex  */
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| 			emac->MACCONTROL = EMAC_MACCONTROL_MIIEN_ENABLE;
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| 		}
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| 
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| 		return(1);
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| 	}
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| 
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| 	return(0);
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| }
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| 
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| 
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| int dp83848_init_phy(int phy_addr)
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| {
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| 	int	ret = 1;
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| 
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| 	if (!dp83848_get_link_speed(phy_addr)) {
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| 		/* Try another time */
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| 		udelay(100000);
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| 		ret = dp83848_get_link_speed(phy_addr);
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| 	}
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| 
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| 	/* Disable PHY Interrupts */
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| 	dm644x_eth_phy_write(phy_addr, DP83848_PHY_INTR_CTRL_REG, 0);
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| 
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| 	return(ret);
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| }
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| 
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| 
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| int dp83848_auto_negotiate(int phy_addr)
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| {
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| 	u_int16_t	tmp;
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| 
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| 
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| 	if (!dm644x_eth_phy_read(phy_addr, DP83848_CTL_REG, &tmp))
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| 		return(0);
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| 
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| 	/* Restart Auto_negotiation  */
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| 	tmp &= ~DP83848_AUTONEG;	/* remove autonegotiation enable */
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| 	tmp |= DP83848_ISOLATE;		/* Electrically isolate PHY */
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| 	dm644x_eth_phy_write(phy_addr, DP83848_CTL_REG, tmp);
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| 
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| 	/* Set the Auto_negotiation Advertisement Register
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| 	 * MII advertising for Next page, 100BaseTxFD and HD,
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| 	 * 10BaseTFD and HD, IEEE 802.3
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| 	 */
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| 	tmp = DP83848_NP | DP83848_TX_FDX | DP83848_TX_HDX |
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| 		DP83848_10_FDX | DP83848_10_HDX | DP83848_AN_IEEE_802_3;
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| 	dm644x_eth_phy_write(phy_addr, DP83848_ANA_REG, tmp);
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| 
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| 
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| 	/* Read Control Register */
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| 	if (!dm644x_eth_phy_read(phy_addr, DP83848_CTL_REG, &tmp))
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| 		return(0);
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| 
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| 	tmp |= DP83848_SPEED_SELECT | DP83848_AUTONEG | DP83848_DUPLEX_MODE;
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| 	dm644x_eth_phy_write(phy_addr, DP83848_CTL_REG, tmp);
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| 
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| 	/* Restart Auto_negotiation  */
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| 	tmp |= DP83848_RESTART_AUTONEG;
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| 	dm644x_eth_phy_write(phy_addr, DP83848_CTL_REG, tmp);
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| 
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| 	/*check AutoNegotiate complete */
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| 	udelay(10000);
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| 	if (!dm644x_eth_phy_read(phy_addr, DP83848_STAT_REG, &tmp))
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| 		return(0);
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| 
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| 	if (!(tmp & DP83848_AUTONEG_COMP))
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| 		return(0);
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| 
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| 	return (dp83848_get_link_speed(phy_addr));
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| }
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| 
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| #endif	/* CONFIG_CMD_NET */
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| 
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| #endif	/* CONFIG_DRIVER_ETHER */
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