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726a802fda
Since ARMv5, the clz instruction allows for efficient implementation of ffs/fls with builtins. Until ARMv7 (with Thumb-2), this instruction is only available in ARM mode. LTO makes it difficult to force specific functions to be in ARM mode, as it is effectively a form of very aggressive inlining. To work around this, fls/ffs are implemented in assembly for ARMv5 and ARMv6 when compiling U-Boot in Thumb mode. Overall, this saves around 75 bytes per call. This code is synced with v5.15 of the Linux kernel. Signed-off-by: Sean Anderson <sean.anderson@seco.com> Reviewed-by: Tom Rini <trini@konsulko.com>
17 lines
379 B
C
17 lines
379 B
C
/* SPDX-License-Identifier: GPL-2.0 */
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#ifndef _ASM_GENERIC_BITOPS_BUILTIN___FFS_H_
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#define _ASM_GENERIC_BITOPS_BUILTIN___FFS_H_
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/**
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* __ffs - find first bit in word.
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* @word: The word to search
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*
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* Undefined if no bit exists, so code should check against 0 first.
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*/
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static __always_inline unsigned long __ffs(unsigned long word)
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{
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return __builtin_ctzl(word);
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}
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#endif
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