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https://github.com/smaeul/u-boot.git
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87 lines
1.8 KiB
C
87 lines
1.8 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright 2019 Google, LLC
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* Written by Simon Glass <sjg@chromium.org>
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*/
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#include <common.h>
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#include <dm.h>
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#include <irq.h>
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#include <log.h>
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#include <asm/io.h>
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/**
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* struct acpi_gpe_priv - private driver information
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*
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* @acpi_base: Base I/O address of ACPI registers
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*/
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struct acpi_gpe_priv {
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ulong acpi_base;
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};
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#define GPE0_STS(x) (0x20 + ((x) * 4))
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static int acpi_gpe_read_and_clear(struct irq *irq)
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{
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struct acpi_gpe_priv *priv = dev_get_priv(irq->dev);
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u32 mask, sts;
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ulong start;
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int ret = 0;
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int bank;
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bank = irq->id / 32;
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mask = 1 << (irq->id % 32);
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/* Wait up to 1ms for GPE status to clear */
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start = get_timer(0);
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do {
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if (get_timer(start) > 1)
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return ret;
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sts = inl(priv->acpi_base + GPE0_STS(bank));
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if (sts & mask) {
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outl(mask, priv->acpi_base + GPE0_STS(bank));
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ret = 1;
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}
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} while (sts & mask);
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return ret;
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}
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static int acpi_gpe_ofdata_to_platdata(struct udevice *dev)
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{
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struct acpi_gpe_priv *priv = dev_get_priv(dev);
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priv->acpi_base = dev_read_addr(dev);
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if (!priv->acpi_base || priv->acpi_base == FDT_ADDR_T_NONE)
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return log_msg_ret("acpi_base", -EINVAL);
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return 0;
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}
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static int acpi_gpe_of_xlate(struct irq *irq, struct ofnode_phandle_args *args)
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{
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irq->id = args->args[0];
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return 0;
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}
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static const struct irq_ops acpi_gpe_ops = {
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.read_and_clear = acpi_gpe_read_and_clear,
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.of_xlate = acpi_gpe_of_xlate,
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};
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static const struct udevice_id acpi_gpe_ids[] = {
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{ .compatible = "intel,acpi-gpe", .data = X86_IRQT_ACPI_GPE },
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{ }
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};
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U_BOOT_DRIVER(acpi_gpe_drv) = {
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.name = "acpi_gpe",
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.id = UCLASS_IRQ,
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.of_match = acpi_gpe_ids,
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.ops = &acpi_gpe_ops,
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.ofdata_to_platdata = acpi_gpe_ofdata_to_platdata,
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.priv_auto_alloc_size = sizeof(struct acpi_gpe_priv),
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};
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