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Tegra uses built in Power Management Controller (PMC) to perform CPU reset. Code to perform this was located in mach-tegra, so lest create DM driver to handle this. Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
46 lines
924 B
C
46 lines
924 B
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright(C) 2023 Svyatoslav Ryhel <clamor95@gmail.com>
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*/
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#include <dm.h>
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#include <errno.h>
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#include <sysreset.h>
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#include <linux/err.h>
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#include <asm/arch-tegra/pmc.h>
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static int tegra_sysreset_request(struct udevice *dev,
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enum sysreset_t type)
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{
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u32 value;
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switch (type) {
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case SYSRESET_WARM:
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case SYSRESET_COLD:
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/* resets everything but scratch 0 and reset status */
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value = tegra_pmc_readl(PMC_CNTRL);
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value |= PMC_CNTRL_MAIN_RST;
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tegra_pmc_writel(value, PMC_CNTRL);
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break;
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default:
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return -EPROTONOSUPPORT;
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}
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return -EINPROGRESS;
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}
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static struct sysreset_ops tegra_sysreset = {
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.request = tegra_sysreset_request,
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};
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U_BOOT_DRIVER(sysreset_tegra) = {
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.id = UCLASS_SYSRESET,
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.name = "sysreset_tegra",
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.ops = &tegra_sysreset,
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};
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/* Link to Tegra PMC once there is a driver */
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U_BOOT_DRVINFO(sysreset_tegra) = {
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.name = "sysreset_tegra"
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};
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