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	Add a comment about the disabled PCIe port nodes. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
		
			
				
	
	
		
			335 lines
		
	
	
		
			6.9 KiB
		
	
	
	
		
			Plaintext
		
	
	
	
	
	
			
		
		
	
	
			335 lines
		
	
	
		
			6.9 KiB
		
	
	
	
		
			Plaintext
		
	
	
	
	
	
| /dts-v1/;
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| 
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| #include "tegra30.dtsi"
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| 
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| / {
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| 	model = "Toradex Apalis T30";
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| 	compatible = "toradex,apalis_t30", "nvidia,tegra30";
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| 
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| 	chosen {
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| 		stdout-path = &uarta;
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| 	};
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| 
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| 	aliases {
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| 		i2c0 = "/i2c@7000d000";
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| 		i2c1 = "/i2c@7000c000";
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| 		i2c2 = "/i2c@7000c500";
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| 		i2c3 = "/i2c@7000c700";
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| 		mmc0 = "/sdhci@78000600";
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| 		mmc1 = "/sdhci@78000400";
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| 		mmc2 = "/sdhci@78000000";
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| 		spi0 = "/spi@7000d400";
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| 		spi1 = "/spi@7000dc00";
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| 		spi2 = "/spi@7000de00";
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| 		spi3 = "/spi@7000da00";
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| 		usb0 = "/usb@7d000000";
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| 		usb1 = "/usb@7d004000";
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| 		usb2 = "/usb@7d008000";
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| 	};
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| 
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| 	memory {
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| 		device_type = "memory";
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| 		reg = <0x80000000 0x40000000>;
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| 	};
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| 
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| 	pcie-controller@00003000 {
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| 		status = "okay";
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| 		avdd-pexa-supply = <&vdd2_reg>;
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| 		vdd-pexa-supply = <&vdd2_reg>;
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| 		avdd-pexb-supply = <&vdd2_reg>;
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| 		vdd-pexb-supply = <&vdd2_reg>;
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| 		avdd-pex-pll-supply = <&vdd2_reg>;
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| 		avdd-plle-supply = <&ldo6_reg>;
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| 		vddio-pex-ctl-supply = <&sys_3v3_reg>;
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| 		hvdd-pex-supply = <&sys_3v3_reg>;
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| 
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| 		pci@1,0 {
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| 			/* TS_DIFF1/2/3/4 left disabled */
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| 			nvidia,num-lanes = <4>;
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| 		};
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| 
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| 		pci@2,0 {
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| 			/* PCIE1_RX/TX left disabled */
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| 			nvidia,num-lanes = <1>;
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| 		};
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| 
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| 		pci@3,0 {
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| 			status = "okay";
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| 			nvidia,num-lanes = <1>;
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| 		};
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| 	};
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| 
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| 	/*
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| 	 * GEN1_I2C: I2C1_SDA/SCL on MXM3 pin 209/211 (e.g. RTC on carrier
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| 	 * board)
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| 	 */
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| 	i2c@7000c000 {
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| 		status = "okay";
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| 		clock-frequency = <100000>;
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| 	};
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| 
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| 	/* GEN2_I2C: unused */
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| 
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| 	/*
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| 	 * CAM_I2C: I2C3_SDA/SCL on MXM3 pin 201/203 (e.g. camera sensor on
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| 	 * carrier board)
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| 	 */
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| 	i2c@7000c500 {
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| 		status = "okay";
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| 		clock-frequency = <100000>;
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| 	};
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| 
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| 	/* DDC: I2C2_SDA/SCL on MXM3 pin 205/207 (e.g. display EDID) */
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| 	i2c@7000c700 {
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| 		status = "okay";
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| 		clock-frequency = <100000>;
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| 	};
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| 
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| 	/*
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| 	 * PWR_I2C: power I2C to audio codec, PMIC, temperature sensor and
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| 	 * touch screen controller
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| 	 */
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| 	i2c@7000d000 {
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| 		status = "okay";
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| 		clock-frequency = <100000>;
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| 
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| 		pmic: tps65911@2d {
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| 			compatible = "ti,tps65911";
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| 			reg = <0x2d>;
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| 
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| 			interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
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| 			#interrupt-cells = <2>;
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| 			interrupt-controller;
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| 
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| 			ti,system-power-controller;
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| 
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| 			#gpio-cells = <2>;
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| 			gpio-controller;
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| 
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| 			vcc1-supply = <&sys_3v3_reg>;
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| 			vcc2-supply = <&sys_3v3_reg>;
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| 			vcc3-supply = <&vio_reg>;
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| 			vcc4-supply = <&sys_3v3_reg>;
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| 			vcc5-supply = <&sys_3v3_reg>;
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| 			vcc6-supply = <&vio_reg>;
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| 			vcc7-supply = <&charge_pump_5v0_reg>;
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| 			vccio-supply = <&sys_3v3_reg>;
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| 
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| 			regulators {
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| 				#address-cells = <1>;
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| 				#size-cells = <0>;
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| 
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| 				/* SW1: +V1.35_VDDIO_DDR */
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| 				vdd1_reg: vdd1 {
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| 					regulator-name = "vddio_ddr_1v35";
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| 					regulator-min-microvolt = <1350000>;
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| 					regulator-max-microvolt = <1350000>;
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| 					regulator-always-on;
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| 				};
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| 
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| 				/* SW2: +V1.05 */
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| 				vdd2_reg: vdd2 {
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| 					regulator-name =
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| 						"vdd_pexa,vdd_pexb,vdd_sata";
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| 					regulator-min-microvolt = <1050000>;
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| 					regulator-max-microvolt = <1050000>;
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| 				};
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| 
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| 				/* SW CTRL: +V1.0_VDD_CPU */
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| 				vddctrl_reg: vddctrl {
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| 					regulator-name = "vdd_cpu,vdd_sys";
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| 					regulator-min-microvolt = <1150000>;
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| 					regulator-max-microvolt = <1150000>;
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| 					regulator-always-on;
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| 				};
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| 
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| 				/* SWIO: +V1.8 */
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| 				vio_reg: vio {
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| 					regulator-name = "vdd_1v8_gen";
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| 					regulator-min-microvolt = <1800000>;
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| 					regulator-max-microvolt = <1800000>;
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| 					regulator-always-on;
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| 				};
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| 
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| 				/* LDO1: unused */
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| 
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| 				/*
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| 				 * EN_+V3.3 switching via FET:
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| 				 * +V3.3_AUDIO_AVDD_S, +V3.3 and +V1.8_VDD_LAN
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| 				 * see also v3_3 fixed supply
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| 				 */
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| 				ldo2_reg: ldo2 {
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| 					regulator-name = "en_3v3";
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| 					regulator-min-microvolt = <3300000>;
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| 					regulator-max-microvolt = <3300000>;
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| 					regulator-always-on;
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| 				};
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| 
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| 				/* +V1.2_CSI */
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| 				ldo3_reg: ldo3 {
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| 					regulator-name =
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| 						"avdd_dsi_csi,pwrdet_mipi";
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| 					regulator-min-microvolt = <1200000>;
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| 					regulator-max-microvolt = <1200000>;
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| 				};
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| 
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| 				/* +V1.2_VDD_RTC */
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| 				ldo4_reg: ldo4 {
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| 					regulator-name = "vdd_rtc";
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| 					regulator-min-microvolt = <1200000>;
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| 					regulator-max-microvolt = <1200000>;
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| 					regulator-always-on;
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| 				};
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| 
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| 				/*
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| 				 * +V2.8_AVDD_VDAC:
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| 				 * only required for analog RGB
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| 				 */
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| 				ldo5_reg: ldo5 {
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| 					regulator-name = "avdd_vdac";
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| 					regulator-min-microvolt = <2800000>;
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| 					regulator-max-microvolt = <2800000>;
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| 					regulator-always-on;
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| 				};
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| 
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| 				/*
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| 				 * +V1.05_AVDD_PLLE: avdd_plle should be 1.05V
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| 				 * but LDO6 can't set voltage in 50mV
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| 				 * granularity
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| 				 */
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| 				ldo6_reg: ldo6 {
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| 					regulator-name = "avdd_plle";
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| 					regulator-min-microvolt = <1100000>;
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| 					regulator-max-microvolt = <1100000>;
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| 				};
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| 
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| 				/* +V1.2_AVDD_PLL */
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| 				ldo7_reg: ldo7 {
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| 					regulator-name = "avdd_pll";
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| 					regulator-min-microvolt = <1200000>;
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| 					regulator-max-microvolt = <1200000>;
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| 					regulator-always-on;
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| 				};
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| 
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| 				/* +V1.0_VDD_DDR_HS */
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| 				ldo8_reg: ldo8 {
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| 					regulator-name = "vdd_ddr_hs";
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| 					regulator-min-microvolt = <1000000>;
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| 					regulator-max-microvolt = <1000000>;
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| 					regulator-always-on;
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| 				};
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| 			};
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| 		};
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| 	};
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| 
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| 	/* SPI1: Apalis SPI1 */
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| 	spi@7000d400 {
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| 		status = "okay";
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| 		spi-max-frequency = <25000000>;
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| 	};
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| 
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| 	/* SPI4: CAN2 */
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| 	spi@7000da00 {
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| 		status = "okay";
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| 		spi-max-frequency = <25000000>;
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| 	};
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| 
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| 	/* SPI5: Apalis SPI2 */
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| 	spi@7000dc00 {
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| 		status = "okay";
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| 		spi-max-frequency = <25000000>;
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| 	};
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| 
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| 	/* SPI6: CAN1 */
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| 	spi@7000de00 {
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| 		status = "okay";
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| 		spi-max-frequency = <25000000>;
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| 	};
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| 
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| 	sdhci@78000000 {
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| 		status = "okay";
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| 		bus-width = <4>;
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| 		/* SD1_CD# */
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| 		cd-gpios = <&gpio TEGRA_GPIO(CC, 5) GPIO_ACTIVE_LOW>;
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| 	};
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| 
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| 	sdhci@78000400 {
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| 		status = "okay";
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| 		bus-width = <8>;
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| 		/* MMC1_CD# */
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| 		cd-gpios = <&gpio TEGRA_GPIO(V, 3) GPIO_ACTIVE_LOW>;
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| 	};
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| 
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| 	sdhci@78000600 {
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| 		status = "okay";
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| 		bus-width = <8>;
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| 		non-removable;
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| 	};
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| 
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| 	/* EHCI instance 0: USB1_DP/N -> USBO1_DP/N */
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| 	usb@7d000000 {
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| 		status = "okay";
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| 		dr_mode = "otg";
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| 		/* USBO1_EN */
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| 		nvidia,vbus-gpio = <&gpio TEGRA_GPIO(T, 5) GPIO_ACTIVE_HIGH>;
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| 	};
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| 
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| 	/* EHCI instance 1: USB2_DP/N -> USBH2_DP/N */
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| 	usb@7d004000 {
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| 		status = "okay";
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| 		/* USBH_EN */
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| 		nvidia,vbus-gpio = <&gpio TEGRA_GPIO(DD, 1) GPIO_ACTIVE_HIGH>;
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| 	};
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| 
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| 	/* EHCI instance 2: USB3_DP/N -> USBH3_DP/N */
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| 	usb@7d008000 {
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| 		status = "okay";
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| 		/* USBH_EN */
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| 		nvidia,vbus-gpio = <&gpio TEGRA_GPIO(DD, 1) GPIO_ACTIVE_HIGH>;
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| 	};
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| 
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| 	clocks {
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| 		compatible = "simple-bus";
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| 		#address-cells = <1>;
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| 		#size-cells = <0>;
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| 
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| 		clk32k_in: clk@0 {
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| 			compatible = "fixed-clock";
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| 			reg=<0>;
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| 			#clock-cells = <0>;
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| 			clock-frequency = <32768>;
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| 		};
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| 		clk16m: clk@1 {
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| 			compatible = "fixed-clock";
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| 			reg=<1>;
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| 			#clock-cells = <0>;
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| 			clock-frequency = <16000000>;
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| 			clock-output-names = "clk16m";
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| 		};
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| 	};
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| 
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| 	regulators {
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| 		compatible = "simple-bus";
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| 		#address-cells = <1>;
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| 		#size-cells = <0>;
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| 
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| 		sys_3v3_reg: regulator@100 {
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| 			compatible = "regulator-fixed";
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| 			reg = <100>;
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| 			regulator-name = "3v3";
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| 			regulator-min-microvolt = <3300000>;
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| 			regulator-max-microvolt = <3300000>;
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| 			regulator-always-on;
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| 		};
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| 
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| 		charge_pump_5v0_reg: regulator@101 {
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| 			compatible = "regulator-fixed";
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| 			reg = <101>;
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| 			regulator-name = "5v0";
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| 			regulator-min-microvolt = <5000000>;
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| 			regulator-max-microvolt = <5000000>;
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| 			regulator-always-on;
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| 		};
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| 	};
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| };
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