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1d3d0f1f1c
This patch add some common code for QCA/Atheros ath79 SOCs such as DDR tuning, chip reset and CPU detection. Signed-off-by: Wills Wang <wills.wang@live.com>
14 lines
238 B
C
14 lines
238 B
C
/*
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* Copyright (C) 2015-2016 Wills Wang <wills.wang@live.com>
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#ifndef __ASM_MACH_DDR_H
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#define __ASM_MACH_DDR_H
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void ddr_init(void);
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void ddr_tap_tuning(void);
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#endif /* __ASM_MACH_DDR_H */
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