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	On Intel Quark, lots of registers on the message port need be programmed. Add handy clrbits, setbits, clrsetbits macros for message port access. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
		
			
				
	
	
		
			138 lines
		
	
	
		
			4.0 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			138 lines
		
	
	
		
			4.0 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
| /*
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|  * Copyright (C) 2015, Bin Meng <bmeng.cn@gmail.com>
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|  *
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|  * SPDX-License-Identifier:	GPL-2.0+
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|  */
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| 
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| #ifndef _QUARK_MSG_PORT_H_
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| #define _QUARK_MSG_PORT_H_
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| 
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| /*
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|  * In the Quark SoC, some chipset commands are accomplished by utilizing
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|  * the internal message network within the host bridge (D0:F0). Accesses
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|  * to this network are accomplished by populating the message control
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|  * register (MCR), Message Control Register eXtension (MCRX) and the
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|  * message data register (MDR).
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|  */
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| #define MSG_CTRL_REG		0xd0	/* Message Control Register */
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| #define MSG_DATA_REG		0xd4	/* Message Data Register */
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| #define MSG_CTRL_EXT_REG	0xd8	/* Message Control Register EXT */
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| 
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| /* Normal Read/Write OpCodes */
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| #define MSG_OP_READ		0x10
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| #define MSG_OP_WRITE		0x11
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| 
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| /* Alternative Read/Write OpCodes */
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| #define MSG_OP_ALT_READ		0x06
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| #define MSG_OP_ALT_WRITE	0x07
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| 
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| /* IO Read/Write OpCodes */
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| #define MSG_OP_IO_READ		0x02
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| #define MSG_OP_IO_WRITE		0x03
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| 
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| /* All byte enables */
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| #define MSG_BYTE_ENABLE		0xf0
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| 
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| #ifndef __ASSEMBLY__
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| 
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| /**
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|  * msg_port_setup - set up the message port control register
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|  *
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|  * @op:     message bus access opcode
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|  * @port:   port number on the message bus
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|  * @reg:    register number within a port
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|  */
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| void msg_port_setup(int op, int port, int reg);
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| 
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| /**
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|  * msg_port_read - read a message port register using normal opcode
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|  *
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|  * @port:   port number on the message bus
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|  * @reg:    register number within a port
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|  *
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|  * @return: message port register value
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|  */
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| u32 msg_port_read(u8 port, u32 reg);
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| 
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| /**
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|  * msg_port_write - write a message port register using normal opcode
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|  *
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|  * @port:   port number on the message bus
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|  * @reg:    register number within a port
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|  * @value:  register value to write
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|  */
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| void msg_port_write(u8 port, u32 reg, u32 value);
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| 
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| /**
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|  * msg_port_alt_read - read a message port register using alternative opcode
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|  *
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|  * @port:   port number on the message bus
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|  * @reg:    register number within a port
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|  *
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|  * @return: message port register value
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|  */
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| u32 msg_port_alt_read(u8 port, u32 reg);
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| 
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| /**
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|  * msg_port_alt_write - write a message port register using alternative opcode
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|  *
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|  * @port:   port number on the message bus
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|  * @reg:    register number within a port
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|  * @value:  register value to write
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|  */
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| void msg_port_alt_write(u8 port, u32 reg, u32 value);
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| 
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| /**
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|  * msg_port_io_read - read a message port register using I/O opcode
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|  *
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|  * @port:   port number on the message bus
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|  * @reg:    register number within a port
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|  *
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|  * @return: message port register value
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|  */
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| u32 msg_port_io_read(u8 port, u32 reg);
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| 
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| /**
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|  * msg_port_io_write - write a message port register using I/O opcode
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|  *
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|  * @port:   port number on the message bus
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|  * @reg:    register number within a port
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|  * @value:  register value to write
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|  */
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| void msg_port_io_write(u8 port, u32 reg, u32 value);
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| 
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| /* clrbits, setbits, clrsetbits macros for message port access */
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| 
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| #define msg_port_normal_read	msg_port_read
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| #define msg_port_normal_write	msg_port_write
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| 
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| #define msg_port_generic_clrsetbits(type, port, reg, clr, set)		\
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| 	msg_port_##type##_write(port, reg,				\
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| 				(msg_port_##type##_read(port, reg)	\
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| 				& ~(clr)) | (set))
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| 
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| #define msg_port_clrbits(port, reg, clr)		\
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| 	msg_port_generic_clrsetbits(normal, port, reg, clr, 0)
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| #define msg_port_setbits(port, reg, set)		\
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| 	msg_port_generic_clrsetbits(normal, port, reg, 0, set)
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| #define msg_port_clrsetbits(port, reg, clr, set)	\
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| 	msg_port_generic_clrsetbits(normal, port, reg, clr, set)
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| 
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| #define msg_port_alt_clrbits(port, reg, clr)		\
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| 	msg_port_generic_clrsetbits(alt, port, reg, clr, 0)
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| #define msg_port_alt_setbits(port, reg, set)		\
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| 	msg_port_generic_clrsetbits(alt, port, reg, 0, set)
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| #define msg_port_alt_clrsetbits(port, reg, clr, set)	\
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| 	msg_port_generic_clrsetbits(alt, port, reg, clr, set)
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| 
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| #define msg_port_io_clrbits(port, reg, clr)		\
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| 	msg_port_generic_clrsetbits(io, port, reg, clr, 0)
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| #define msg_port_io_setbits(port, reg, set)		\
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| 	msg_port_generic_clrsetbits(io, port, reg, 0, set)
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| #define msg_port_io_clrsetbits(port, reg, clr, set)	\
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| 	msg_port_generic_clrsetbits(io, port, reg, clr, set)
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| 
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| #endif /* __ASSEMBLY__ */
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| 
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| #endif /* _QUARK_MSG_PORT_H_ */
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