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105a9e705e
Each way of the system cache has 256 entries for PH1-Pro4 and older SoCs, whereas 512 entries for PH1-Pro5 and newer SoCs. The line size is still 128 byte. Thus, the way size is 32KB/64KB for old/new SoCs. To keep lowlevel_init SoC-independent, set BOOT_RAM_SIZE to the constant value 32KB. It is large enough for temporary RAM and should work for all the SoCs of UniPhier family. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
66 lines
1.6 KiB
C
66 lines
1.6 KiB
C
/*
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* UniPhier System Cache (L2 Cache) registers
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*
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* Copyright (C) 2011-2014 Panasonic Corporation
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#ifndef ARCH_SSC_REGS_H
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#define ARCH_SSC_REGS_H
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#define SSCC 0x500c0000
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#define SSCC_BST (0x1 << 20)
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#define SSCC_ACT (0x1 << 19)
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#define SSCC_WTG (0x1 << 18)
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#define SSCC_PRD (0x1 << 17)
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#define SSCC_WBWA (0x1 << 16)
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#define SSCC_EX (0x1 << 13)
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#define SSCC_ON (0x1 << 0)
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#define SSCLPDAWCR 0x500c0030
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#define SSCOPE 0x506c0244
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#define SSCOPE_CM_SYNC 0x00000008
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#define SSCOQM 0x506c0248
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#define SSCOQM_TID_MASK (0x3 << 21)
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#define SSCOQM_TID_BY_WAY (0x2 << 21)
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#define SSCOQM_TID_BY_INST_WAY (0x1 << 21)
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#define SSCOQM_TID_BY_DATA_WAY (0x0 << 21)
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#define SSCOQM_S_MASK (0x3 << 17)
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#define SSCOQM_S_WAY (0x2 << 17)
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#define SSCOQM_S_ALL (0x1 << 17)
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#define SSCOQM_S_ADDRESS (0x0 << 17)
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#define SSCOQM_CE (0x1 << 15)
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#define SSCOQM_CW (0x1 << 14)
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#define SSCOQM_CM_MASK (0x7)
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#define SSCOQM_CM_DIRT_TOUCH (0x7)
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#define SSCOQM_CM_ZERO_TOUCH (0x6)
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#define SSCOQM_CM_NORM_TOUCH (0x5)
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#define SSCOQM_CM_PREF_FETCH (0x4)
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#define SSCOQM_CM_SSC_FETCH (0x3)
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#define SSCOQM_CM_WB_INV (0x2)
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#define SSCOQM_CM_WB (0x1)
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#define SSCOQM_CM_INV (0x0)
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#define SSCOQAD 0x506c024c
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#define SSCOQSZ 0x506c0250
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#define SSCOQWN 0x506c0258
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#define SSCOPPQSEF 0x506c025c
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#define SSCOPPQSEF_FE (0x1 << 1)
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#define SSCOPPQSEF_OE (0x1 << 0)
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#define SSCOLPQS 0x506c0260
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#define SSCOLPQS_EF (0x1 << 2)
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#define SSCOLPQS_EST (0x1 << 1)
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#define SSCOLPQS_QST (0x1 << 0)
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#define SSCOQCE0 0x506c0270
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#define SSC_LINE_SIZE 128
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#define SSC_RANGE_OP_MAX_SIZE (0x00400000 - (SSC_LINE_SIZE))
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#endif /* ARCH_SSC_REGS_H */
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