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	Signed-off-by: Wolfgang Denk <wd@denx.de> [trini: Fixup common/cmd_io.c] Signed-off-by: Tom Rini <trini@ti.com>
		
			
				
	
	
		
			41 lines
		
	
	
		
			1.5 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			41 lines
		
	
	
		
			1.5 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
/*
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 * (C) Copyright 2004, Psyent Corporation <www.psyent.com>
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 * Scott McNutt <smcnutt@psyent.com>
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 *
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 * SPDX-License-Identifier:	GPL-2.0+
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 */
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#ifndef __NIOS2_H__
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#define __NIOS2_H__
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/*------------------------------------------------------------------------
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 * Control registers -- use with wrctl() & rdctl()
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 *----------------------------------------------------------------------*/
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#define CTL_STATUS	0		/* Processor status reg		*/
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#define CTL_ESTATUS	1		/* Exception status reg		*/
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#define CTL_BSTATUS	2		/* Break status reg		*/
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#define CTL_IENABLE	3		/* Interrut enable reg		*/
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#define CTL_IPENDING	4		/* Interrut pending reg		*/
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/*------------------------------------------------------------------------
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 * Access to control regs
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 *----------------------------------------------------------------------*/
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#define rdctl(reg) __builtin_rdctl(reg)
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#define wrctl(reg, val) __builtin_wrctl(reg, val)
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/*------------------------------------------------------------------------
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 * Control reg bit masks
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 *----------------------------------------------------------------------*/
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#define STATUS_IE	(1<<0)		/* Interrupt enable		*/
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#define STATUS_U	(1<<1)		/* User-mode			*/
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/*------------------------------------------------------------------------
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 * Bit-31 Cache bypass -- only valid for data access. When data cache
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 * is not implemented, bit 31 is ignored for compatibility.
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 *----------------------------------------------------------------------*/
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#define CACHE_BYPASS(a) ((a) | 0x80000000)
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#define CACHE_NO_BYPASS(a) ((a) & ~0x80000000)
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#endif /* __NIOS2_H__ */
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