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8f0960e837
CONFIG_SYS_HZ of SH2 is not used as frequency of base timer. This is the correct clock of CMT. This changes from CONFIG_SYS_HZ to CONFIG_SH_CMT_CLK_FREQ, in order to use CONFIG_SYS_HZ as clock of CMT. Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
89 lines
1.6 KiB
C
89 lines
1.6 KiB
C
/*
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* Copyright (C) 2007,2008 Nobobuhiro Iwamatsu <iwamatsu@nigauri.org>
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* Copyright (C) 2008 Renesas Solutions Corp.
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*
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* (C) Copyright 2003
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* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <common.h>
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#include <asm/io.h>
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#include <asm/processor.h>
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#define CMT_CMCSR_INIT 0x0001 /* PCLK/32 */
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#define CMT_CMCSR_CALIB 0x0000
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#define CMT_MAX_COUNTER (0xFFFFFFFF)
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#define CMT_TIMER_RESET (0xFFFF)
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static vu_long cmt0_timer;
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static void cmt_timer_start(unsigned int timer)
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{
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writew(readw(CMSTR) | 0x01, CMSTR);
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}
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static void cmt_timer_stop(unsigned int timer)
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{
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writew(readw(CMSTR) & ~0x01, CMSTR);
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}
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int timer_init(void)
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{
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cmt0_timer = 0;
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/* Divide clock by 32 */
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readw(CMCSR_0);
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writew(CMT_CMCSR_INIT, CMCSR_0);
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/* User Device 0 only */
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cmt_timer_stop(0);
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writew(CMT_TIMER_RESET, CMCOR_0);
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cmt_timer_start(0);
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return 0;
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}
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unsigned long long get_ticks(void)
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{
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return cmt0_timer;
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}
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static vu_long cmcnt = 0;
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static unsigned long get_usec (void)
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{
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ulong data = readw(CMCNT_0);
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if (data >= cmcnt)
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cmcnt = data - cmcnt;
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else
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cmcnt = (CMT_TIMER_RESET - cmcnt) + data;
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if ((cmt0_timer + cmcnt) > CMT_MAX_COUNTER)
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cmt0_timer = ((cmt0_timer + cmcnt) - CMT_MAX_COUNTER);
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else
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cmt0_timer += cmcnt;
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cmcnt = data;
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return cmt0_timer;
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}
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/* return msec */
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ulong get_timer(ulong base)
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{
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return (get_usec() / 1000) - base;
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}
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void __udelay(unsigned long usec)
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{
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unsigned long end = get_usec() + usec;
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while (get_usec() < end)
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continue;
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}
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unsigned long get_tbclk(void)
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{
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return CONFIG_SH_CMT_CLK_FREQ;
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}
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