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https://github.com/smaeul/u-boot.git
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595f3e5645
Add initial support for Freescale MX53 processor, - Add the iomux support and the pin definition, - Add the regs definition, clean up some unused def from mx51, - Add the low level init support, make use the freq input of setup_pll macro Signed-off-by: Jason Liu <r64343@freescale.com>
92 lines
3.6 KiB
C
92 lines
3.6 KiB
C
/*
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* (C) Copyright 2008-2009 Freescale Semiconductor, Inc.
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#ifndef __MACH_MX5_IOMUX_H__
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#define __MACH_MX5_IOMUX_H__
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#include <common.h>
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#include <asm/io.h>
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#include <asm/arch/imx-regs.h>
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#include <asm/arch/mx5x_pins.h>
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typedef unsigned int iomux_pin_name_t;
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/* various IOMUX output functions */
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typedef enum iomux_config {
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IOMUX_CONFIG_ALT0, /*!< used as alternate function 0 */
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IOMUX_CONFIG_ALT1, /*!< used as alternate function 1 */
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IOMUX_CONFIG_ALT2, /*!< used as alternate function 2 */
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IOMUX_CONFIG_ALT3, /*!< used as alternate function 3 */
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IOMUX_CONFIG_ALT4, /*!< used as alternate function 4 */
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IOMUX_CONFIG_ALT5, /*!< used as alternate function 5 */
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IOMUX_CONFIG_ALT6, /*!< used as alternate function 6 */
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IOMUX_CONFIG_ALT7, /*!< used as alternate function 7 */
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IOMUX_CONFIG_GPIO, /*!< added to help user use GPIO mode */
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IOMUX_CONFIG_SION = 0x1 << 4, /*!< used as LOOPBACK:MUX SION bit */
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} iomux_pin_cfg_t;
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/* various IOMUX pad functions */
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typedef enum iomux_pad_config {
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PAD_CTL_SRE_SLOW = 0x0 << 0, /* Slow slew rate */
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PAD_CTL_SRE_FAST = 0x1 << 0, /* Fast slew rate */
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PAD_CTL_DRV_LOW = 0x0 << 1, /* Low drive strength */
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PAD_CTL_DRV_MEDIUM = 0x1 << 1, /* Medium drive strength */
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PAD_CTL_DRV_HIGH = 0x2 << 1, /* High drive strength */
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PAD_CTL_DRV_MAX = 0x3 << 1, /* Max drive strength */
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PAD_CTL_ODE_OPENDRAIN_NONE = 0x0 << 3, /* Opendrain disable */
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PAD_CTL_ODE_OPENDRAIN_ENABLE = 0x1 << 3,/* Opendrain enable */
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PAD_CTL_100K_PD = 0x0 << 4, /* 100Kohm pulldown */
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PAD_CTL_47K_PU = 0x1 << 4, /* 47Kohm pullup */
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PAD_CTL_100K_PU = 0x2 << 4, /* 100Kohm pullup */
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PAD_CTL_22K_PU = 0x3 << 4, /* 22Kohm pullup */
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PAD_CTL_PUE_KEEPER = 0x0 << 6, /* enable pulldown */
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PAD_CTL_PUE_PULL = 0x1 << 6, /* enable pullup */
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PAD_CTL_PKE_NONE = 0x0 << 7, /* Disable pullup/pulldown */
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PAD_CTL_PKE_ENABLE = 0x1 << 7, /* Enable pullup/pulldown */
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PAD_CTL_HYS_NONE = 0x0 << 8, /* Hysteresis disabled */
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PAD_CTL_HYS_ENABLE = 0x1 << 8, /* Hysteresis enabled */
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PAD_CTL_DDR_INPUT_CMOS = 0x0 << 9,/* DDR input CMOS */
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PAD_CTL_DDR_INPUT_DDR = 0x1 << 9,/* DDR input DDR */
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PAD_CTL_DRV_VOT_LOW = 0x0 << 13, /* Low voltage mode */
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PAD_CTL_DRV_VOT_HIGH = 0x1 << 13,/* High voltage mode */
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} iomux_pad_config_t;
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/* various IOMUX input functions */
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typedef enum iomux_input_config {
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INPUT_CTL_PATH0 = 0x0,
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INPUT_CTL_PATH1,
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INPUT_CTL_PATH2,
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INPUT_CTL_PATH3,
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INPUT_CTL_PATH4,
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INPUT_CTL_PATH5,
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INPUT_CTL_PATH6,
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INPUT_CTL_PATH7,
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} iomux_input_config_t;
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void mxc_request_iomux(iomux_pin_name_t pin, iomux_pin_cfg_t config);
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void mxc_free_iomux(iomux_pin_name_t pin, iomux_pin_cfg_t config);
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void mxc_iomux_set_pad(iomux_pin_name_t pin, u32 config);
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unsigned int mxc_iomux_get_pad(iomux_pin_name_t pin);
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void mxc_iomux_set_input(iomux_input_select_t input, u32 config);
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#endif /* __MACH_MX5_IOMUX_H__ */
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