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22 lines
729 B
Plaintext
22 lines
729 B
Plaintext
Lattice iCE40 FPGA Manager
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Required properties:
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- compatible: Should contain "lattice,ice40-fpga-mgr"
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- reg: SPI chip select
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- spi-max-frequency: Maximum SPI frequency (>=1000000, <=25000000)
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- cdone-gpios: GPIO input connected to CDONE pin
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- reset-gpios: Active-low GPIO output connected to CRESET_B pin. Note
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that unless the GPIO is held low during startup, the
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FPGA will enter Master SPI mode and drive SCK with a
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clock signal potentially jamming other devices on the
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bus until the firmware is loaded.
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Example:
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fpga: fpga@0 {
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compatible = "lattice,ice40-fpga-mgr";
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reg = <0>;
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spi-max-frequency = <1000000>;
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cdone-gpios = <&gpio 24 GPIO_ACTIVE_HIGH>;
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reset-gpios = <&gpio 22 GPIO_ACTIVE_LOW>;
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};
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