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	The rest of the unmigrated CONFIG symbols in the CONFIG_SYS namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
		
			
				
	
	
		
			62 lines
		
	
	
		
			1.5 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			62 lines
		
	
	
		
			1.5 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
| /* SPDX-License-Identifier: GPL-2.0+ */
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| /*
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|  * (C) Copyright 2010
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|  * Ilko Iliev <iliev@ronetix.at>
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|  * Asen Dimov <dimov@ronetix.at>
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|  * Ronetix GmbH <www.ronetix.at>
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|  *
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|  * (C) Copyright 2007-2008
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|  * Stelian Pop <stelian@popies.net>
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|  * Lead Tech Design <www.leadtechdesign.com>
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|  *
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|  * Configuation settings for the PM9G45 board.
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|  */
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| 
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| #ifndef __CONFIG_H
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| #define __CONFIG_H
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| 
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| /* ARM asynchronous clock */
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| #define CFG_SYS_AT91_SLOW_CLOCK      32768
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| #define CFG_SYS_AT91_MAIN_CLOCK      12000000 /* from 12 MHz crystal */
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| 
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| /* SDRAM */
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| #define CFG_SYS_SDRAM_BASE           0x70000000
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| #define CFG_SYS_SDRAM_SIZE		0x08000000
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| 
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| /* NAND flash */
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| #ifdef CONFIG_CMD_NAND
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| #define CFG_SYS_NAND_BASE			ATMEL_BASE_CS3
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| /* our ALE is AD21 */
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| #define CFG_SYS_NAND_MASK_ALE		BIT(21)
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| /* our CLE is AD22 */
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| #define CFG_SYS_NAND_MASK_CLE		BIT(22)
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| #define CFG_SYS_NAND_ENABLE_PIN		AT91_PIN_PC14
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| #define CFG_SYS_NAND_READY_PIN		AT91_PIN_PD3
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| #endif
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| 
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| #ifdef CONFIG_NAND_BOOT
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| /* bootstrap + u-boot + env in nandflash */
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| #elif CONFIG_SD_BOOT
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| /* bootstrap + u-boot + env + linux in mmc */
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| #endif
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| 
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| /* Defines for SPL */
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| 
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| #ifdef CONFIG_SD_BOOT
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| #elif CONFIG_NAND_BOOT
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| #define CFG_SYS_NAND_U_BOOT_SIZE	0x80000
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| 
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| #define CFG_SYS_NAND_ECCSIZE		256
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| #define CFG_SYS_NAND_ECCBYTES	3
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| #define CFG_SYS_NAND_ECCPOS		{ 40, 41, 42, 43, 44, 45, 46, 47, \
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| 					  48, 49, 50, 51, 52, 53, 54, 55, \
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| 					  56, 57, 58, 59, 60, 61, 62, 63, }
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| #endif
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| 
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| #define CFG_SYS_MASTER_CLOCK		132096000
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| #define CFG_SYS_AT91_PLLA		0x20c73f03
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| #define CFG_SYS_MCKR			0x1301
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| #define CFG_SYS_MCKR_CSS		0x1302
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| 
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| #endif
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