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e66c49fa93
This patch adds support for stm32f7 family & stm32f746 board. Signed-off-by: Vikas Manocha <vikas.manocha@st.com>
57 lines
1.4 KiB
C
57 lines
1.4 KiB
C
/*
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* (C) Copyright 2016
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* Vikas Manocha, <vikas.manocha@st.com>
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <common.h>
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#include <asm/io.h>
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#include <asm/arch/rcc.h>
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#include <asm/arch/stm32.h>
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#include <asm/arch/stm32_periph.h>
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void clock_setup(int peripheral)
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{
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switch (peripheral) {
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case USART1_CLOCK_CFG:
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setbits_le32(RCC_BASE + RCC_APB2ENR, RCC_ENR_USART1EN);
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break;
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case GPIO_A_CLOCK_CFG:
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setbits_le32(RCC_BASE + RCC_AHB1ENR, RCC_ENR_GPIO_A_EN);
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break;
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case GPIO_B_CLOCK_CFG:
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setbits_le32(RCC_BASE + RCC_AHB1ENR, RCC_ENR_GPIO_B_EN);
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break;
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case GPIO_C_CLOCK_CFG:
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setbits_le32(RCC_BASE + RCC_AHB1ENR, RCC_ENR_GPIO_C_EN);
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break;
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case GPIO_D_CLOCK_CFG:
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setbits_le32(RCC_BASE + RCC_AHB1ENR, RCC_ENR_GPIO_D_EN);
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break;
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case GPIO_E_CLOCK_CFG:
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setbits_le32(RCC_BASE + RCC_AHB1ENR, RCC_ENR_GPIO_E_EN);
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break;
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case GPIO_F_CLOCK_CFG:
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setbits_le32(RCC_BASE + RCC_AHB1ENR, RCC_ENR_GPIO_F_EN);
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break;
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case GPIO_G_CLOCK_CFG:
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setbits_le32(RCC_BASE + RCC_AHB1ENR, RCC_ENR_GPIO_G_EN);
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break;
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case GPIO_H_CLOCK_CFG:
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setbits_le32(RCC_BASE + RCC_AHB1ENR, RCC_ENR_GPIO_H_EN);
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break;
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case GPIO_I_CLOCK_CFG:
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setbits_le32(RCC_BASE + RCC_AHB1ENR, RCC_ENR_GPIO_I_EN);
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break;
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case GPIO_J_CLOCK_CFG:
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setbits_le32(RCC_BASE + RCC_AHB1ENR, RCC_ENR_GPIO_J_EN);
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break;
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case GPIO_K_CLOCK_CFG:
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setbits_le32(RCC_BASE + RCC_AHB1ENR, RCC_ENR_GPIO_K_EN);
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break;
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default:
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break;
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}
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}
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