mirror of
https://github.com/smaeul/u-boot.git
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400558b561
- rename CONFIG_BOOTBINFUNC into CONFIG_INIT_CRITICAL - rename memsetup into lowlevel_init (function name and source files)
137 lines
3.0 KiB
ArmAsm
137 lines
3.0 KiB
ArmAsm
/*
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* Memory Setup stuff - taken from blob memsetup.S
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*
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* Copyright (C) 1999 2000 2001 Erik Mouw (J.A.K.Mouw@its.tudelft.nl) and
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* Jan-Derk Bakker (J.D.Bakker@its.tudelft.nl)
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* 2004 (c) MontaVista Software, Inc.
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#include "config.h"
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#include "version.h"
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/*-----------------------------------------------------------------------
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* Board defines:
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*/
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#define MDCNFG 0x00
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#define MDCAS00 0x04
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#define MDCAS01 0x08
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#define MDCAS02 0x0C
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#define MSC0 0x10
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#define MSC1 0x14
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#define MECR 0x18
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#define MDREFR 0x1C
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#define MDCAS20 0x20
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#define MDCAS21 0x24
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#define MDCAS22 0x28
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#define MSC2 0x2C
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#define SMCNFG 0x30
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#define ASSABET_BCR (0x12000000)
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#define ASSABET_BCR_DB1110 (0x00a07490 | (0<<16) | (0<<17))
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#define ASSABET_SCR_nNEPONSET (1 << 9)
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#define NEPONSET_LEDS (0x10000010)
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/*-----------------------------------------------------------------------
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* Setup parameters for the board:
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*/
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MEM_BASE: .long 0xa0000000
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MEM_START: .long 0xc0000000
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mdcnfg: .long 0x72547254
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mdcas00: .long 0xaaaaaa7f
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mdcas01: .long 0xaaaaaaaa
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mdcas02: .long 0xaaaaaaaa
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msc0: .long 0x4b384370
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msc1: .long 0x22212419
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mecr: .long 0x994a994a
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mdrefr: .long 0x04340327
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mdcas20: .long 0xaaaaaa7f
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mdcas21: .long 0xaaaaaaaa
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mdcas22: .long 0xaaaaaaaa
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msc2: .long 0x42196669
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smcnfg: .long 0x00000000
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BCR: .long ASSABET_BCR
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BCR_DB1110: .long ASSABET_BCR_DB1110
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LEDS: .long NEPONSET_LEDS
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.globl lowlevel_init
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lowlevel_init:
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/* Setting up the memory and stuff */
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ldr r0, MEM_BASE
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ldr r1, mdcas00
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str r1, [r0, #MDCAS00]
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ldr r1, mdcas01
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str r1, [r0, #MDCAS01]
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ldr r1, mdcas02
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str r1, [r0, #MDCAS02]
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ldr r1, mdcas20
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str r1, [r0, #MDCAS20]
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ldr r1, mdcas21
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str r1, [r0, #MDCAS21]
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ldr r1, mdcas22
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str r1, [r0, #MDCAS22]
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ldr r1, mdrefr
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str r1, [r0, #MDREFR]
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ldr r1, mecr
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str r1, [r0, #MECR]
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ldr r1, msc0
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str r1, [r0, #MSC0]
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ldr r1, msc1
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str r1, [r0, #MSC1]
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ldr r1, msc2
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str r1, [r0, #MSC2]
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ldr r1, smcnfg
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str r1, [r0, #SMCNFG]
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ldr r1, mdcnfg
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str r1, [r0, #MDCNFG]
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/* Load something to activate bank */
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ldr r2, MEM_START
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.rept 8
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ldr r3, [r2]
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.endr
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/* Enable SDRAM */
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orr r1, r1, #0x00000001
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str r1, [r0, #MDCNFG]
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ldr r1, BCR
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ldr r2, BCR_DB1110
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str r2, [r1]
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ldr r1, LEDS
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mov r0, #0x3
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str r0, [r1]
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/* All done... */
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mov pc, lr
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