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	This driver only supports Driver Model, not legacy model. Signed-off-by: Albert ARIBAUD (3ADEV) <albert.aribaud@3adev.fr>
		
			
				
	
	
		
			44 lines
		
	
	
		
			842 B
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			44 lines
		
	
	
		
			842 B
		
	
	
	
		
			C
		
	
	
	
	
	
| /*
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|  * LPC32xx GPIO interface
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|  *
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|  * (C) Copyright 2014  DENX Software Engineering GmbH
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|  * Written-by: Albert ARIBAUD <albert.aribaud@3adev.fr>
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|  *
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|  * SPDX-License-Identifier:	GPL-2.0+
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|  */
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| 
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| /**
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|  * GPIO Register map for LPC32xx
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|  */
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| 
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| struct gpio_regs {
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| 	u32 p3_inp_state;
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| 	u32 p3_outp_set;
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| 	u32 p3_outp_clr;
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| 	u32 p3_outp_state;
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| 	/* Watch out! the following are shared between p2 and p3 */
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| 	u32 p2_p3_dir_set;
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| 	u32 p2_p3_dir_clr;
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| 	u32 p2_p3_dir_state;
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| 	/* Now back to 'one register for one port' */
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| 	u32 p2_inp_state;
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| 	u32 p2_outp_set;
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| 	u32 p2_outp_clr;
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| 	u32 reserved1[6];
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| 	u32 p0_inp_state;
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| 	u32 p0_outp_set;
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| 	u32 p0_outp_clr;
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| 	u32 p0_outp_state;
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| 	u32 p0_dir_set;
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| 	u32 p0_dir_clr;
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| 	u32 p0_dir_state;
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| 	u32 reserved2;
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| 	u32 p1_inp_state;
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| 	u32 p1_outp_set;
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| 	u32 p1_outp_clr;
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| 	u32 p1_outp_state;
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| 	u32 p1_dir_set;
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| 	u32 p1_dir_clr;
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| 	u32 p1_dir_state;
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| };
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