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	This helps to clean up the include/ directory so that it only contains non-architecture-specific headers and also matches Linux's directory layout which many U-Boot developers are already familiar with. Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
		
			
				
	
	
		
			187 lines
		
	
	
		
			6.0 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			187 lines
		
	
	
		
			6.0 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
| /*
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|  * include/asm-armnommu/arch-netarm/netarm_gen_module.h
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|  *
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|  * Copyright (C) 2005
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|  * Art Shipkowski, Videon Central, Inc., <art@videon-central.com>
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|  *
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|  * Copyright (C) 2000, 2001 NETsilicon, Inc.
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|  * Copyright (C) 2000, 2001 Red Hat, Inc.
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|  *
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|  * This software is copyrighted by Red Hat. LICENSEE agrees that
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|  * it will not delete this copyright notice, trademarks or protective
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|  * notices from any copy made by LICENSEE.
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|  *
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|  * This software is provided "AS-IS" and any express or implied
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|  * warranties or conditions, including but not limited to any
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|  * implied warranties of merchantability and fitness for a particular
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|  * purpose regarding this software. In no event shall Red Hat
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|  * be liable for any indirect, consequential, or incidental damages,
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|  * loss of profits or revenue, loss of use or data, or interruption
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|  * of business, whether the alleged damages are labeled in contract,
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|  * tort, or indemnity.
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|  *
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|  * This program is free software; you can redistribute it and/or modify
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|  * it under the terms of the GNU General Public License as published by
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|  * the Free Software Foundation; either version 2 of the License, or
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|  * (at your option) any later version.
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|  *
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|  * You should have received a copy of the GNU General Public License
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|  * along with this program; if not, write to the Free Software
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|  * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
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|  *
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|  * author(s) : Joe deBlaquiere
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|  *
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|  * Modified to support NS7520 by Art Shipkowski.
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|  */
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| 
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| #ifndef __NETARM_GEN_MODULE_REGISTERS_H
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| #define __NETARM_GEN_MODULE_REGISTERS_H
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| 
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| /* GEN unit register offsets */
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| 
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| #define NETARM_GEN_MODULE_BASE		(0xFFB00000)
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| 
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| #define get_gen_reg_addr(c) ((volatile unsigned int *)(NETARM_GEN_MODULE_BASE + (c)))
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| 
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| #define NETARM_GEN_SYSTEM_CONTROL	(0x00)
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| #define NETARM_GEN_STATUS_CONTROL	(0x04)
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| #define NETARM_GEN_PLL_CONTROL		(0x08)
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| #define NETARM_GEN_SOFTWARE_SERVICE	(0x0c)
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| 
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| #define NETARM_GEN_TIMER1_CONTROL	(0x10)
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| #define NETARM_GEN_TIMER1_STATUS	(0x14)
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| #define NETARM_GEN_TIMER2_CONTROL	(0x18)
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| #define NETARM_GEN_TIMER2_STATUS	(0x1c)
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| 
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| #define NETARM_GEN_PORTA		(0x20)
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| #ifndef CONFIG_NETARM_NS7520
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| #define NETARM_GEN_PORTB		(0x24)
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| #endif
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| #define NETARM_GEN_PORTC		(0x28)
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| 
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| #define NETARM_GEN_INTR_ENABLE		(0x30)
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| #define NETARM_GEN_INTR_ENABLE_SET	(0x34)
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| #define NETARM_GEN_INTR_ENABLE_CLR	(0x38)
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| #define NETARM_GEN_INTR_STATUS_EN	(0x34)
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| #define NETARM_GEN_INTR_STATUS_RAW	(0x38)
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| 
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| #define NETARM_GEN_CACHE_CONTROL1	(0x40)
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| #define NETARM_GEN_CACHE_CONTROL2	(0x44)
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| 
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| /* select bitfield definitions */
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| 
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| /* System Control Register ( 0xFFB0_0000 ) */
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| 
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| #define NETARM_GEN_SYS_CFG_LENDIAN	(0x80000000)
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| #define NETARM_GEN_SYS_CFG_BENDIAN	(0x00000000)
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| 
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| #define NETARM_GEN_SYS_CFG_BUSQRTR	(0x00000000)
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| #define NETARM_GEN_SYS_CFG_BUSHALF	(0x20000000)
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| #define NETARM_GEN_SYS_CFG_BUSFULL	(0x40000000)
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| 
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| #define NETARM_GEN_SYS_CFG_BCLK_DISABLE (0x10000000)
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| 
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| #define NETARM_GEN_SYS_CFG_WDOG_EN	(0x01000000)
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| #define NETARM_GEN_SYS_CFG_WDOG_IRQ	(0x00000000)
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| #define NETARM_GEN_SYS_CFG_WDOG_FIQ	(0x00400000)
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| #define NETARM_GEN_SYS_CFG_WDOG_RST	(0x00800000)
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| #define NETARM_GEN_SYS_CFG_WDOG_24	(0x00000000)
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| #define NETARM_GEN_SYS_CFG_WDOG_26	(0x00100000)
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| #define NETARM_GEN_SYS_CFG_WDOG_28	(0x00200000)
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| #define NETARM_GEN_SYS_CFG_WDOG_29	(0x00300000)
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| 
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| #define NETARM_GEN_SYS_CFG_BUSMON_EN	(0x00040000)
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| #define NETARM_GEN_SYS_CFG_BUSMON_128	(0x00000000)
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| #define NETARM_GEN_SYS_CFG_BUSMON_64	(0x00010000)
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| #define NETARM_GEN_SYS_CFG_BUSMON_32	(0x00020000)
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| #define NETARM_GEN_SYS_CFG_BUSMON_16	(0x00030000)
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| 
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| #define NETARM_GEN_SYS_CFG_USER_EN	(0x00008000)
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| #define NETARM_GEN_SYS_CFG_BUSER_EN	(0x00004000)
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| 
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| #define NETARM_GEN_SYS_CFG_BUSARB_INT	(0x00002000)
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| #define NETARM_GEN_SYS_CFG_BUSARB_EXT	(0x00000000)
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| 
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| #define NETARM_GEN_SYS_CFG_DMATST	(0x00001000)
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| 
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| #define NETARM_GEN_SYS_CFG_TEALAST	(0x00000800)
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| 
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| #define NETARM_GEN_SYS_CFG_ALIGN_ABORT	(0x00000400)
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| 
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| #define NETARM_GEN_SYS_CFG_CACHE_EN	(0x00000200)
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| 
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| #define NETARM_GEN_SYS_CFG_WRI_BUF_EN	(0x00000100)
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| 
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| #define NETARM_GEN_SYS_CFG_CACHE_INIT	(0x00000080)
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| 
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| /* PLL Control Register ( 0xFFB0_0008 ) */
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| 
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| #define NETARM_GEN_PLL_CTL_PLLCNT_MASK	(0x0F000000)
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| 
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| #define NETARM_GEN_PLL_CTL_PLLCNT(x)	(((x)<<24) & \
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| 					 NETARM_GEN_PLL_CTL_PLLCNT_MASK)
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| 
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| /* Defaults for POLTST and ICP Fields in PLL CTL */
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| #define NETARM_GEN_PLL_CTL_OUTDIV(x)	(x)
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| #define NETARM_GEN_PLL_CTL_INDIV(x)	((x)<<6)
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| #define NETARM_GEN_PLL_CTL_POLTST_DEF	(0x00000E00)
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| #define NETARM_GEN_PLL_CTL_ICP_DEF	(0x0000003C)
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| 
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| 
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| /* Software Service Register ( 0xFFB0_000C ) */
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| 
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| #define NETARM_GEN_SW_SVC_RESETA	(0x123)
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| #define NETARM_GEN_SW_SVC_RESETB	(0x321)
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| 
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| /* PORT C Register ( 0xFFB0_0028 ) */
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| 
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| #ifndef CONFIG_NETARM_NS7520
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| #define NETARM_GEN_PORT_MODE(x)		(((x)<<24) + (0xFF00))
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| #define NETARM_GEN_PORT_DIR(x)		(((x)<<16) + (0xFF00))
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| #else
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| #define NETARM_GEN_PORT_MODE(x)		((x)<<24)
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| #define NETARM_GEN_PORT_DIR(x)		((x)<<16)
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| #define NETARM_GEN_PORT_CSF(x)		((x)<<8)
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| #endif
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| 
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| /* Timer Registers ( 0xFFB0_0010 0xFFB0_0018 ) */
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| 
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| #define NETARM_GEN_TCTL_ENABLE		(0x80000000)
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| #define NETARM_GEN_TCTL_INT_ENABLE	(0x40000000)
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| 
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| #define NETARM_GEN_TCTL_USE_IRQ		(0x00000000)
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| #define NETARM_GEN_TCTL_USE_FIQ		(0x20000000)
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| 
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| #define NETARM_GEN_TCTL_USE_PRESCALE	(0x10000000)
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| #define NETARM_GEN_TCTL_INIT_COUNT(x)	((x) & 0x1FF)
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| 
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| #define NETARM_GEN_TSTAT_INTPEN		(0x40000000)
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| #if ~defined(CONFIG_NETARM_NS7520)
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| #define NETARM_GEN_TSTAT_CTC_MASK	(0x000001FF)
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| #else
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| #define NETARM_GEN_TSTAT_CTC_MASK	(0x0FFFFFFF)
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| #endif
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| 
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| /* prescale to msecs conversion */
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| 
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| #if !defined(CONFIG_NETARM_PLL_BYPASS)
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| #define NETARM_GEN_TIMER_MSEC_P(x)	( ( ( 20480 ) * ( 0x1FF - ( (x) &	    \
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| 					    NETARM_GEN_TSTAT_CTC_MASK ) +   \
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| 					    1 ) ) / (NETARM_XTAL_FREQ/1000) )
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| 
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| #define NETARM_GEN_TIMER_SET_HZ(x)	( ( ((NETARM_XTAL_FREQ/(20480*(x)))-1) & \
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| 					  NETARM_GEN_TSTAT_CTC_MASK ) | \
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| 					  NETARM_GEN_TCTL_USE_PRESCALE )
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| 
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| #else
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| #define NETARM_GEN_TIMER_MSEC_P(x)	( ( ( 4096 ) * ( 0x1FF - ( (x) &    \
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| 					    NETARM_GEN_TSTAT_CTC_MASK ) +   \
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| 					    1 ) ) / (NETARM_XTAL_FREQ/1000) )
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| 
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| #define NETARM_GEN_TIMER_SET_HZ(x)	( ( ((NETARM_XTAL_FREQ/(4096*(x)))-1) & \
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| 					  NETARM_GEN_TSTAT_CTC_MASK ) | \
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| 					  NETARM_GEN_TCTL_USE_PRESCALE )
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| #endif
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| 
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| #endif
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