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	CSSI has another CPU board, similar to the CMPC885 board that get plugged on the two base boards MCR3000_2G and MIAE. That CPU board is called CMPCPRO because it has a MPC8321E CPU, also known as Power QUICC II PRO. Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu>
		
			
				
	
	
		
			44 lines
		
	
	
		
			1007 B
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			44 lines
		
	
	
		
			1007 B
		
	
	
	
		
			C
		
	
	
	
	
	
| // SPDX-License-Identifier: GPL-2.0+
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| /*
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|  * Copyright (C) 2010-2023 CS GROUP France
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|  * Florent TRINH THAI (florent.trinh-thai@csgroup.eu)
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|  * Stephane FRANJOU (stephane.franjou@csgroup.eu)
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|  */
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| 
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| #include <config.h>
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| #include <nand.h>
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| #include <linux/bitops.h>
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| #include <linux/mtd/rawnand.h>
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| #include <asm/io.h>
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| 
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| #define BIT_CLE		BIT(6)
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| #define BIT_ALE		BIT(5)
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| 
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| static u32 nand_mask(unsigned int ctrl)
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| {
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| 	return ((ctrl & NAND_CLE) ? BIT_CLE : 0) |
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| 	       ((ctrl & NAND_ALE) ? BIT_ALE : 0);
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| }
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| 
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| static void nand_hwcontrol(struct mtd_info *mtdinfo, int cmd, unsigned int ctrl)
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| {
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| 	immap_t __iomem *immr = (immap_t *)CONFIG_SYS_IMMR;
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| 	struct nand_chip *chip = mtd_to_nand(mtdinfo);
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| 
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| 	if (ctrl & NAND_CTRL_CHANGE)
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| 		clrsetbits_be32(&immr->qepio.ioport[2].pdat,
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| 				BIT_CLE | BIT_ALE, nand_mask(ctrl));
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| 
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| 	if (cmd != NAND_CMD_NONE)
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| 		out_8(chip->IO_ADDR_W, cmd);
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| }
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| 
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| int board_nand_init(struct nand_chip *nand)
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| {
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| 	nand->chip_delay	= 60;
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| 	nand->ecc.mode		= NAND_ECC_SOFT;
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| 	nand->cmd_ctrl		= nand_hwcontrol;
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| 
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| 	return 0;
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| }
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