mirror of
https://github.com/smaeul/u-boot.git
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b62450cf22
CONFIG_VAL(DEBUG_UART_BASE) expands to CONFIG_DEBUG_UART_BASE or
CONFIG_SPL_DEBUG_UART_BASE or CONFIG_TPL_DEBUG_UART_BASE and allows boards
to set different values for SPL, TPL and U-Boot Proper.
For ns16550 driver this support is there since commit d293759d55cc
("serial: ns16550: Add support for SPL_DEBUG_UART_BASE").
Signed-off-by: Pali Rohár <pali@kernel.org>
104 lines
2.2 KiB
C
104 lines
2.2 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright (C) 2016 Masahiro Yamada <yamada.masahiro@socionext.com>
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*/
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#include <debug_uart.h>
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#include <linux/io.h>
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#include <linux/serial_reg.h>
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#include "../sg-regs.h"
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#include "../soc-info.h"
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#include "debug-uart.h"
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#define UNIPHIER_UART_TX 0x00
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#define UNIPHIER_UART_LCR_MCR 0x10
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#define UNIPHIER_UART_LSR 0x14
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#define UNIPHIER_UART_LDR 0x24
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static void _debug_uart_putc(int c)
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{
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void __iomem *base = (void __iomem *)CONFIG_VAL(DEBUG_UART_BASE);
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while (!(readl(base + UNIPHIER_UART_LSR) & UART_LSR_THRE))
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;
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writel(c, base + UNIPHIER_UART_TX);
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}
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#ifdef CONFIG_SPL_BUILD
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void sg_set_pinsel(unsigned int pin, unsigned int muxval,
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unsigned int mux_bits, unsigned int reg_stride)
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{
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unsigned int shift = pin * mux_bits % 32;
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void __iomem *reg = sg_base + SG_PINCTRL_BASE +
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pin * mux_bits / 32 * reg_stride;
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u32 mask = (1U << mux_bits) - 1;
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u32 tmp;
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tmp = readl(reg);
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tmp &= ~(mask << shift);
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tmp |= (mask & muxval) << shift;
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writel(tmp, reg);
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}
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void sg_set_iectrl(unsigned int pin)
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{
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unsigned int bit = pin % 32;
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void __iomem *reg = sg_base + SG_IECTRL + pin / 32 * 4;
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u32 tmp;
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tmp = readl(reg);
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tmp |= 1 << bit;
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writel(tmp, reg);
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}
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#endif
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void _debug_uart_init(void)
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{
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#ifdef CONFIG_SPL_BUILD
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void __iomem *base = (void __iomem *)CONFIG_VAL(DEBUG_UART_BASE);
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unsigned int divisor;
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switch (uniphier_get_soc_id()) {
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#if defined(CONFIG_ARCH_UNIPHIER_LD4)
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case UNIPHIER_LD4_ID:
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divisor = uniphier_ld4_debug_uart_init();
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break;
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#endif
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#if defined(CONFIG_ARCH_UNIPHIER_PRO4)
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case UNIPHIER_PRO4_ID:
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divisor = uniphier_pro4_debug_uart_init();
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break;
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#endif
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#if defined(CONFIG_ARCH_UNIPHIER_SLD8)
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case UNIPHIER_SLD8_ID:
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divisor = uniphier_sld8_debug_uart_init();
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break;
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#endif
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#if defined(CONFIG_ARCH_UNIPHIER_PRO5)
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case UNIPHIER_PRO5_ID:
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divisor = uniphier_pro5_debug_uart_init();
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break;
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#endif
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#if defined(CONFIG_ARCH_UNIPHIER_PXS2)
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case UNIPHIER_PXS2_ID:
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divisor = uniphier_pxs2_debug_uart_init();
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break;
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#endif
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#if defined(CONFIG_ARCH_UNIPHIER_LD6B)
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case UNIPHIER_LD6B_ID:
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divisor = uniphier_ld6b_debug_uart_init();
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break;
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#endif
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default:
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return;
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}
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writel(UART_LCR_WLEN8 << 8, base + UNIPHIER_UART_LCR_MCR);
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writel(divisor, base + UNIPHIER_UART_LDR);
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#endif
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}
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DEBUG_UART_FUNCS
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