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smaeul-u-boot/arch/riscv/lib
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Zong Li 40c76dfed2 riscv: cache: support cache enable in SPL stage 
The power gating feature of pl2 should be enabled as early as possible,
it would be better to put it in SPL stage.

Signed-off-by: Zong Li <zong.li@sifive.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2023-12-27 17:28:57 +08:00
..
aclint_ipi.c
riscv: Remove common.h usage
2023-10-24 16:34:45 -04:00
andes_plicsw.c
riscv: andes: Fix enable register settings of PLICSW
2023-12-06 16:05:39 +08:00
asm-offsets.c
riscv: Remove common.h usage
2023-10-24 16:34:45 -04:00
boot.c
riscv: Remove common.h usage
2023-10-24 16:34:45 -04:00
bootm.c
bootm: Adjust arguments of boot_os_fn
2023-12-21 16:07:52 -05:00
cache.c
riscv: Weakly define invalidate_icache_range()
2023-11-02 15:15:54 +08:00
crt0_riscv_efi.S
efi_loader: set IMAGE_FILE_LARGE_ADDRESS_AWARE
2022-12-29 10:51:50 +01:00
elf_riscv32_efi.lds
efi_loader: fix SectionAlignment, FileAlignment
2022-01-15 10:57:22 +01:00
elf_riscv64_efi.lds
efi_loader: fix SectionAlignment, FileAlignment
2022-01-15 10:57:22 +01:00
fdt_fixup.c
riscv: Remove common.h usage
2023-10-24 16:34:45 -04:00
image.c
riscv: Remove common.h usage
2023-10-24 16:34:45 -04:00
interrupts.c
riscv: allow resume after exception
2023-11-02 16:22:06 +08:00
Makefile
riscv: Add Zbb support for building U-Boot
2023-10-19 17:29:50 +08:00
memcpy.S
riscv: memcpy: check src and dst before copy
2023-02-01 16:17:45 +08:00
memmove.S
riscv: Fix memmove and optimise memcpy when misalign
2021-05-17 16:47:33 +08:00
memset.S
riscv: assembler versions of memcpy, memmove, memset
2021-04-08 15:37:29 +08:00
reloc_riscv_efi.c
riscv: Remove unused _relocate arguments
2018-07-19 16:31:37 -04:00
reset.c
riscv: Add a reset_cpu() function
2023-12-21 16:07:52 -05:00
sbi_ipi.c
riscv: Remove common.h usage
2023-10-24 16:34:45 -04:00
sbi.c
riscv: Remove common.h usage
2023-10-24 16:34:45 -04:00
semihosting.S
riscv: semihosting: replace inline assembly with assembly file
2023-03-06 19:24:34 -05:00
setjmp.S
riscv: simplify longjmp
2021-04-08 15:37:29 +08:00
sifive_cache.c
riscv: cache: support cache enable in SPL stage
2023-12-27 17:28:57 +08:00
smp.c
riscv: Remove common.h usage
2023-10-24 16:34:45 -04:00
spl.c
riscv: Remove common.h usage
2023-10-24 16:34:45 -04:00
strcmp_zbb.S
riscv: Add Zbb support for building U-Boot
2023-10-19 17:29:50 +08:00
strlen_zbb.S
riscv: Add Zbb support for building U-Boot
2023-10-19 17:29:50 +08:00
strncmp_zbb.S
riscv: Add Zbb support for building U-Boot
2023-10-19 17:29:50 +08:00