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	When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com>
		
			
				
	
	
		
			171 lines
		
	
	
		
			3.3 KiB
		
	
	
	
		
			ArmAsm
		
	
	
	
	
	
			
		
		
	
	
			171 lines
		
	
	
		
			3.3 KiB
		
	
	
	
		
			ArmAsm
		
	
	
	
	
	
/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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 * Copyright (C) 2008 Renesas Solutions Corp.
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 * Copyright (C) 2008 Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com>
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 *
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 * board/ap325rxa/lowlevel_init.S
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 */
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#include <config.h>
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#include <asm/processor.h>
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#include <asm/macro.h>
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/*
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 * Board specific low level init code, called _very_ early in the
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 * startup sequence. Relocation to SDRAM has not happened yet, no
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 * stack is available, bss section has not been initialised, etc.
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 *
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 * (Note: As no stack is available, no subroutines can be called...).
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 */
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	.global	lowlevel_init
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	.text
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	.align	2
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lowlevel_init:
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	write16	DRVCRA_A, DRVCRA_D
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	write16	DRVCRB_A, DRVCRB_D
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	write16	RWTCSR_A, RWTCSR_D1
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	write16	RWTCNT_A, RWTCNT_D
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	write16	RWTCSR_A, RWTCSR_D2
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	write32	FRQCR_A, FRQCR_D
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	write32	CMNCR_A, CMNCR_D
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	write32	CS0BCR_A, CS0BCR_D
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	write32	CS4BCR_A, CS4BCR_D
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	write32	CS5ABCR_A, CS5ABCR_D
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	write32	CS5BBCR_A, CS5BBCR_D
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	write32	CS6ABCR_A, CS6ABCR_D
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	write32	CS6BBCR_A, CS6BBCR_D
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	write32	CS0WCR_A, CS0WCR_D
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	write32	CS4WCR_A, CS4WCR_D
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	write32	CS5AWCR_A, CS5AWCR_D
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	write32	CS5BWCR_A, CS5BWCR_D
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	write32	CS6AWCR_A, CS6AWCR_D
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	write32	CS6BWCR_A, CS6BWCR_D
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	write32	SBSC_SDCR_A, SBSC_SDCR_D1
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	write32	SBSC_SDWCR_A, SBSC_SDWCR_D
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	write32	SBSC_SDPCR_A, SBSC_SDPCR_D
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	write32	SBSC_RTCSR_A, SBSC_RTCSR_D
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	write32	SBSC_RTCNT_A, SBSC_RTCNT_D
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	write32	SBSC_RTCOR_A, SBSC_RTCOR_D
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	write8	SBSC_SDMR3_A1, SBSC_SDMR3_D
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	write8	SBSC_SDMR3_A2, SBSC_SDMR3_D
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	mov.l	SLEEP_CNT, r1
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2:	tst	r1, r1
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	nop
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	bf/s	2b
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	dt	r1
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	write8	SBSC_SDMR3_A3, SBSC_SDMR3_D
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	write32	SBSC_SDCR_A, SBSC_SDCR_D2
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	write32	CCR_A, CCR_D
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	! BL bit off (init = ON) (?!?)
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	stc	sr, r0				! BL bit off(init=ON)
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	mov.l	SR_MASK_D, r1
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	and	r1, r0
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	ldc	r0, sr
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	rts
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	 mov	#0, r0
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	.align	2
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DRVCRA_A:	.long	DRVCRA
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DRVCRB_A:	.long	DRVCRB
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DRVCRA_D:	.word	0x4555
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DRVCRB_D:	.word	0x0005
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RWTCSR_A:	.long	RWTCSR
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RWTCNT_A:	.long	RWTCNT
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FRQCR_A:	.long	FRQCR
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RWTCSR_D1:	.word	0xa507
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RWTCSR_D2:	.word	0xa504
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RWTCNT_D:	.word	0x5a00
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.align 2
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FRQCR_D:	.long	0x0b04474a
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SBSC_SDCR_A:	.long	SBSC_SDCR
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SBSC_SDWCR_A:	.long	SBSC_SDWCR
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SBSC_SDPCR_A:	.long	SBSC_SDPCR
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SBSC_RTCSR_A:	.long	SBSC_RTCSR
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SBSC_RTCNT_A:	.long	SBSC_RTCNT
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SBSC_RTCOR_A:	.long	SBSC_RTCOR
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SBSC_SDMR3_A1:	.long	0xfe510000
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SBSC_SDMR3_A2:	.long	0xfe500242
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SBSC_SDMR3_A3:	.long	0xfe5c0042
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SBSC_SDCR_D1:	.long	0x92810112
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SBSC_SDCR_D2:	.long	0x92810912
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SBSC_SDWCR_D:	.long	0x05162482
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SBSC_SDPCR_D:	.long	0x00300087
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SBSC_RTCSR_D:	.long	0xa55a0212
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SBSC_RTCNT_D:	.long	0xa55a0000
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SBSC_RTCOR_D:	.long	0xa55a0040
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SBSC_SDMR3_D:	.long	0x00
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CMNCR_A:	.long	CMNCR
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CS0BCR_A:	.long	CS0BCR
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CS4BCR_A:	.long	CS4BCR
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CS5ABCR_A:	.long	CS5ABCR
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CS5BBCR_A:	.long	CS5BBCR
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CS6ABCR_A:	.long	CS6ABCR
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CS6BBCR_A:	.long	CS6BBCR
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CS0WCR_A:	.long	CS0WCR
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CS4WCR_A:	.long	CS4WCR
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CS5AWCR_A:	.long	CS5AWCR
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CS5BWCR_A:	.long	CS5BWCR
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CS6AWCR_A:	.long	CS6AWCR
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CS6BWCR_A:	.long	CS6BWCR
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CMNCR_D:	.long	0x00000013
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CS0BCR_D:	.long	0x24920400
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CS4BCR_D:	.long	0x24920400
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CS5ABCR_D:	.long	0x24920400
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CS5BBCR_D:	.long	0x7fff0600
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CS6ABCR_D:	.long	0x24920400
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CS6BBCR_D:	.long	0x24920600
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CS0WCR_D:	.long	0x00000480
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CS4WCR_D:	.long	0x00000480
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CS5AWCR_D:	.long	0x00000380
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CS5BWCR_D:	.long	0x00000080
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CS6AWCR_D:	.long	0x00000300
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CS6BWCR_D:	.long	0x00000540
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CCR_A:		.long	0xff00001c
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CCR_D:		.long	0x0000090d
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SLEEP_CNT:	.long	0x00000800
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SR_MASK_D:	.long	0xEFFFFF0F
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