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e0283cbdfd
Driver should be enabled by CONFIG_POWER_DOMAIN=y and CONFIG_ZYNQMP_POWER_DOMAIN=y. Power domain driver doesn't have own DT node but it uses zynqmp firmware DT node that's why there is a need to bind driver when firmware node is found. Driver itself is simple. It is sending pmufw config object overlay for enabling access to device which is done in ...domain_request(). In ...domain_on() capabilities are passed and node is requested. This should be bare minimum of required to get power domain driver working. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com> Link: https://lore.kernel.org/r/f4b9433b91c0b18c375b061c7a4e29d428f70547.1644226055.git.michal.simek@xilinx.com
90 lines
2.1 KiB
C
90 lines
2.1 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* Copyright (c) 2021, Xilinx. Inc.
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*/
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#include <common.h>
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#include <dm.h>
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#include <log.h>
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#include <malloc.h>
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#include <misc.h>
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#include <power-domain-uclass.h>
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#include <linux/bitops.h>
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#include <zynqmp_firmware.h>
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#define NODE_ID_LOCATION 5
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static unsigned int xpm_configobject[] = {
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/* HEADER */
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2, /* Number of remaining words in the header */
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1, /* Number of sections included in config object */
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PM_CONFIG_OBJECT_TYPE_OVERLAY, /* Type of Config object as overlay */
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/* SLAVE SECTION */
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PM_CONFIG_SLAVE_SECTION_ID, /* Section ID */
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1, /* Number of slaves */
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0, /* Node ID which will be changed below */
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PM_SLAVE_FLAG_IS_SHAREABLE,
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PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK |
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PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK |
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PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK, /* IPI Mask */
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};
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static int zynqmp_pm_request_node(const u32 node, const u32 capabilities,
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const u32 qos, const enum zynqmp_pm_request_ack ack)
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{
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return xilinx_pm_request(PM_REQUEST_NODE, node, capabilities,
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qos, ack, NULL);
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}
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static int zynqmp_power_domain_request(struct power_domain *power_domain)
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{
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/* Record power domain id */
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xpm_configobject[NODE_ID_LOCATION] = power_domain->id;
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zynqmp_pmufw_load_config_object(xpm_configobject, sizeof(xpm_configobject));
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return 0;
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}
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static int zynqmp_power_domain_free(struct power_domain *power_domain)
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{
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/* nop now */
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return 0;
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}
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static int zynqmp_power_domain_on(struct power_domain *power_domain)
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{
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return zynqmp_pm_request_node(power_domain->id,
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ZYNQMP_PM_CAPABILITY_ACCESS,
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ZYNQMP_PM_MAX_QOS,
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ZYNQMP_PM_REQUEST_ACK_BLOCKING);
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}
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static int zynqmp_power_domain_off(struct power_domain *power_domain)
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{
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/* nop now */
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return 0;
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}
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struct power_domain_ops zynqmp_power_domain_ops = {
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.request = zynqmp_power_domain_request,
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.rfree = zynqmp_power_domain_free,
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.on = zynqmp_power_domain_on,
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.off = zynqmp_power_domain_off,
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};
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static int zynqmp_power_domain_probe(struct udevice *dev)
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{
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return 0;
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}
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U_BOOT_DRIVER(zynqmp_power_domain) = {
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.name = "zynqmp_power_domain",
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.id = UCLASS_POWER_DOMAIN,
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.probe = zynqmp_power_domain_probe,
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.ops = &zynqmp_power_domain_ops,
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};
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