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	On some newer chipset (eg: BayTrail), there is an IO base address register on the PCH device which configures the base address of a memory-mapped I/O controller. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org>
		
			
				
	
	
		
			95 lines
		
	
	
		
			2.5 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			95 lines
		
	
	
		
			2.5 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
| /*
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|  * Copyright (c) 2015 Google, Inc
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|  * Written by Simon Glass <sjg@chromium.org>
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|  *
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|  * SPDX-License-Identifier:	GPL-2.0+
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|  */
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| 
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| #ifndef __pch_h
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| #define __pch_h
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| 
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| #define PCH_RCBA		0xf0
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| 
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| #define BIOS_CTRL_BIOSWE	BIT(0)
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| 
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| /* Operations for the Platform Controller Hub */
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| struct pch_ops {
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| 	/**
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| 	 * get_spi_base() - get the address of SPI base
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| 	 *
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| 	 * @dev:	PCH device to check
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| 	 * @sbasep:	Returns address of SPI base if available, else 0
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| 	 * @return 0 if OK, -ve on error (e.g. there is no SPI base)
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| 	 */
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| 	int (*get_spi_base)(struct udevice *dev, ulong *sbasep);
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| 
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| 	/**
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| 	 * set_spi_protect() - set whether SPI flash is protected or not
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| 	 *
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| 	 * @dev:	PCH device to adjust
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| 	 * @protect:	true to protect, false to unprotect
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| 	 *
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| 	 * @return 0 on success, -ENOSYS if not implemented
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| 	 */
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| 	int (*set_spi_protect)(struct udevice *dev, bool protect);
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| 
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| 	/**
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| 	 * get_gpio_base() - get the address of GPIO base
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| 	 *
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| 	 * @dev:	PCH device to check
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| 	 * @gbasep:	Returns address of GPIO base if available, else 0
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| 	 * @return 0 if OK, -ve on error (e.g. there is no GPIO base)
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| 	 */
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| 	int (*get_gpio_base)(struct udevice *dev, u32 *gbasep);
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| 
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| 	/**
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| 	 * get_io_base() - get the address of IO base
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| 	 *
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| 	 * @dev:	PCH device to check
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| 	 * @iobasep:	Returns address of IO base if available, else 0
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| 	 * @return 0 if OK, -ve on error (e.g. there is no IO base)
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| 	 */
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| 	int (*get_io_base)(struct udevice *dev, u32 *iobasep);
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| };
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| 
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| #define pch_get_ops(dev)        ((struct pch_ops *)(dev)->driver->ops)
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| 
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| /**
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|  * pch_get_spi_base() - get the address of SPI base
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|  *
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|  * @dev:	PCH device to check
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|  * @sbasep:	Returns address of SPI base if available, else 0
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|  * @return 0 if OK, -ve on error (e.g. there is no SPI base)
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|  */
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| int pch_get_spi_base(struct udevice *dev, ulong *sbasep);
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| 
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| /**
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|  * set_spi_protect() - set whether SPI flash is protected or not
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|  *
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|  * @dev:	PCH device to adjust
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|  * @protect:	true to protect, false to unprotect
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|  *
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|  * @return 0 on success, -ENOSYS if not implemented
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|  */
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| int pch_set_spi_protect(struct udevice *dev, bool protect);
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| 
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| /**
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|  * pch_get_gpio_base() - get the address of GPIO base
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|  *
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|  * @dev:	PCH device to check
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|  * @gbasep:	Returns address of GPIO base if available, else 0
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|  * @return 0 if OK, -ve on error (e.g. there is no GPIO base)
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|  */
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| int pch_get_gpio_base(struct udevice *dev, u32 *gbasep);
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| 
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| /**
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|  * pch_get_io_base() - get the address of IO base
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|  *
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|  * @dev:	PCH device to check
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|  * @iobasep:	Returns address of IO base if available, else 0
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|  * @return 0 if OK, -ve on error (e.g. there is no IO base)
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|  */
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| int pch_get_io_base(struct udevice *dev, u32 *iobasep);
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| 
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| #endif
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