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	Freescale DDR driver has been used for mpc83xx, mpc85xx, mpc86xx SoCs. The similar DDR controllers will be used for ARM-based SoCs. Signed-off-by: York Sun <yorksun@freescale.com>
		
			
				
	
	
		
			58 lines
		
	
	
		
			1.7 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			58 lines
		
	
	
		
			1.7 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
| /*
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|  * Copyright 2008 Freescale Semiconductor, Inc.
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|  *
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|  * This program is free software; you can redistribute it and/or
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|  * modify it under the terms of the GNU General Public License
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|  * Version 2 as published by the Free Software Foundation.
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|  */
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| 
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| #ifndef COMMON_TIMING_PARAMS_H
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| #define COMMON_TIMING_PARAMS_H
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| 
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| typedef struct {
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| 	/* parameters to constrict */
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| 
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| 	unsigned int tckmin_x_ps;
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| 	unsigned int tckmax_ps;
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| 	unsigned int tckmax_max_ps;
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| 	unsigned int trcd_ps;
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| 	unsigned int trp_ps;
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| 	unsigned int tras_ps;
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| 
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| 	unsigned int twr_ps;	/* maximum = 63750 ps */
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| 	unsigned int twtr_ps;	/* maximum = 63750 ps */
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| 	unsigned int trfc_ps;	/* maximum = 255 ns + 256 ns + .75 ns
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| 					   = 511750 ps */
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| 
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| 	unsigned int trrd_ps;	/* maximum = 63750 ps */
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| 	unsigned int trc_ps;	/* maximum = 254 ns + .75 ns = 254750 ps */
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| 
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| 	unsigned int refresh_rate_ps;
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| 	unsigned int extended_op_srt;
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| 
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| 	unsigned int tis_ps;	/* byte 32, spd->ca_setup */
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| 	unsigned int tih_ps;	/* byte 33, spd->ca_hold */
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| 	unsigned int tds_ps;	/* byte 34, spd->data_setup */
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| 	unsigned int tdh_ps;	/* byte 35, spd->data_hold */
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| 	unsigned int trtp_ps;	/* byte 38, spd->trtp */
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| 	unsigned int tdqsq_max_ps;	/* byte 44, spd->tdqsq */
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| 	unsigned int tqhs_ps;	/* byte 45, spd->tqhs */
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| 
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| 	unsigned int ndimms_present;
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| 	unsigned int lowest_common_SPD_caslat;
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| 	unsigned int highest_common_derated_caslat;
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| 	unsigned int additive_latency;
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| 	unsigned int all_dimms_burst_lengths_bitmask;
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| 	unsigned int all_dimms_registered;
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| 	unsigned int all_dimms_unbuffered;
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| 	unsigned int all_dimms_ecc_capable;
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| 
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| 	unsigned long long total_mem;
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| 	unsigned long long base_address;
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| 
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| 	/* DDR3 RDIMM */
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| 	unsigned char rcw[16];	/* Register Control Word 0-15 */
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| } common_timing_params_t;
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| 
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| #endif
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