Patrick Delaunay d219415544 stm32mp1: clk: support digital bypass ...

HSE and LSE bypass shall support both analog and digital signals.
This patch add a way to select digital bypas case in the device tree
and set the associated bit DIGBYP in RCC_BDCR and RCC_OCEN register
during clock tree initialization.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>

2018-07-20 15:55:07 -04:00

..

microchip,pic32-clock.txt

drivers: clk: Add clock driver for Microchip PIC32 Microcontroller.

2016-02-01 22:14:00 +01:00

nvidia,tegra20-car.txt

tegra: fdt: Add clock bindings

2012-03-29 08:12:48 +02:00

rockchip,rk3188-cru.txt

rockchip: Bring in RK3288 device tree file includes and bindings

2015-09-02 21:28:23 -06:00

rockchip,rk3288-cru.txt

rockchip: Bring in RK3288 device tree file includes and bindings

2015-09-02 21:28:23 -06:00

rockchip,rk3288-dmc.txt

rockchip: Bring in RK3288 device tree file includes and bindings

2015-09-02 21:28:23 -06:00

rockchip,rk3368-dmc.txt

rockchip: rk3368: add DRAM controller driver with DRAM initialisation

2017-08-13 17:12:33 +02:00

rockchip,rk3399-dmc.txt

rockchip: arm64: rk3399: add ddr controller driver

2017-03-16 16:03:45 -06:00

rockchip.txt

rockchip: Bring in RK3288 device tree file includes and bindings

2015-09-02 21:28:23 -06:00

snps,hsdk-cgu.txt

ARC: clk: introduce HSDK CGU clock driver

2017-12-11 11:36:23 +03:00

st,stm32-rcc.txt

clk: stm32f7: add clock driver for stm32f7 family

2017-03-17 14:15:12 -04:00

st,stm32h7-rcc.txt

dm: clk: add clk driver support for stm32h7 SoCs

2017-09-22 07:40:01 -04:00

st,stm32mp1.txt

stm32mp1: clk: support digital bypass

2018-07-20 15:55:07 -04:00