smaeul-u-boot

mirror of https://github.com/smaeul/u-boot.git synced 2025-10-31 03:58:17 +00:00

History

Nishanth Menon 3eb80d10c7 ARM: DRA7: DDR: Enable SR in Power Management Control

If EMIF is idle for certain amount of DDR cycles, EMIF will put the
DDR in self refresh mode to save power if EMIF_PWR_MGMT_CTRL register
is programmed. And also before entering suspend-resume ddr needs to
be put in self-refresh. Linux kernel does not program this register
before entering suspend and relies on u-boot setting.
So configuring it in u-boot.

Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Tested-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Tom Rini <trini@konsulko.com>

2016-03-15 21:30:19 -04:00

arc

arc: cache - utilize IO coherency (AKA IOC) engine

2016-02-20 11:20:05 +03:00

arm

ARM: DRA7: DDR: Enable SR in Power Management Control

2016-03-15 21:30:19 -04:00

avr32

avr32: Use the generic bitops headers

2015-11-05 10:52:31 -05:00

blackfin

Use correct spelling of "U-Boot"