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Improve documentation. Signed-off-by: Christian Hewitt <christianshewitt@gmail.com> Link: https://lore.kernel.org/r/20230320114609.930145-3-christianshewitt@gmail.com Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
137 lines
6.7 KiB
ReStructuredText
137 lines
6.7 KiB
ReStructuredText
.. SPDX-License-Identifier: GPL-2.0+
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Amlogic SoC Boot Flow
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=====================
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Amlogic SoCs follow a pre-defined boot sequence stored in SoC ROM code. The possible boot
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sequences of the different SoC families are:
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GX* & AXG Family
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----------------
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+----------+-------------------+---------+---------+---------+---------+
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| | 1 | 2 | 3 | 4 | 5 |
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+==========+===================+=========+=========+=========+=========+
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| S905 | POC=0: SPI NOR | eMMC | NAND | SD | USB |
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| S905D | | | | | |
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| S905L | | | | | |
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| S905W | | | | | |
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| S905X | | | | | |
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| S905Y | | | | | |
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| S912 | | | | | |
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+----------+-------------------+---------+---------+---------+---------+
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| S805X | POC=0: SPI NOR | eMMC | NAND | USB | - |
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| A113D | | | | | |
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| A113X | | | | | |
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+----------+-------------------+---------+---------+---------+---------+
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POC pin: `NAND_CLE`
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Some boards provide a button to force USB boot by disabling the eMMC clock signal and
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allowing the eMMC step to be bypassed. Others have removable eMMC modules; removing an
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eMMC module and SD card will allow boot from USB.
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An exception is the Libre Computer AML-S805X-XX (LaFrite) board which has no SD card
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slot and boots from SPI. Booting a LaFrite board from USB requires either:
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- Erasing the first sectors of SPI NOR flash
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- Inserting an HDMI boot plug forcing boot over USB
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The VIM1 and initial VIM2 boards provide a test point on the eMMC signals to block the
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storage from answering, allowing boot to continue with the next boot step.
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USB boot uses the first USB interface. On some boards this port is only available on a
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USB-A type connector and requires a special Type-A to Type-A cable to communicate with
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the BootROM.
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G12* & SM1 Family
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-----------------
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+-------+-------+-------+------------+------------+------------+-----------+
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| POC0 | POC1 | POC2 | 1 | 2 | 3 | 4 |
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+=======+=======+=======+============+============+============+===========+
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| 0 | 0 | 0 | USB | SPI-NOR | NAND/eMMC | SD |
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+-------+-------+-------+------------+------------+-------------+----------+
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| 0 | 0 | 1 | USB | NAND/eMMC | SD | - |
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+-------+-------+-------+------------+------------+------------+-----------+
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| 0 | 1 | 0 | SPI-NOR | NAND/eMMC | SD | USB |
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+-------+-------+-------+------------+------------+------------+-----------+
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| 0 | 1 | 1 | SPI-NAND | NAND/eMMC | USB | - |
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+-------+-------+-------+------------+------------+------------+-----------+
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| 1 | 0 | 0 | USB | SPI-NOR | NAND/eMMC | SD |
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+-------+-------+-------+------------+------------+------------+-----------+
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| 1 | 0 | 1 | USB | NAND/eMMC | SD | - |
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+-------+-------+-------+------------+------------+------------+-----------+
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| 1 | 1 | 0 | SPI-NOR | NAND/eMMC | SD | USB |
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+-------+-------+-------+------------+------------+------------+-----------+
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| 1 | 1 | 1 | NAND/eMMC | SD | USB | - |
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+-------+-------+-------+------------+------------+------------+-----------+
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The last option (1/1/1) is the normal default seen on production devices:
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* POC0 pin: `BOOT_4` (0 and all other 1 means SPI NAND boot first)
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* POC1 pin: `BOOT_5` (0 and all other 1 means USB Device boot first
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* POC2 pin: `BOOT_6` (0 and all other 1 means SPI NOR boot first)
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Most boards provide a button to force USB BOOT which lowers `BOOT_5` to 0. Some boards
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provide a test point on eMMC or SPI NOR clock signals to block storage from answering
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and allowing boot to continue from the next boot step.
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The Khadas VIM3/3L boards embed a microcontroller which sets POC signals according to
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its configuration or a specific key press sequence to either boot from SPI NOR or eMMC
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then SD card, or boot as a USB device.
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The Odroid N2/N2+ has a hardware switch to select between SPI NOR or eMMC boot. The
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Odroid HC4 has a button to disable SPI-NOR allowing boot from SD card.
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Boot Modes
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----------
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* SD
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The BootROM fetches the first SD card sectors in one sequence then checks the content of
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the data. It expects to find the FIP binary in sector 1, 512 bytes offset from the start.
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* eMMC
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The BootROM fetches the first sectors of the main partition in one sequence then checks
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the content of the data. On GXL and newer boards it expects to find the FIP binary in
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sector 1, 512 bytes offset from the start. If not found it checks the boot0 partition,
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then the boot1 partition. On GXBB it expects to find the FIP binary at an offset that
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conflicts with MBR partition tables, but this has been worked around (thus avoiding the
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need for a partition scheme that relocates the MBR). For a more detailed explanation
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please see: https://github.com/LibreELEC/amlogic-boot-fip/pull/8
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* SPI-NOR
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The BootROM fetches the first SPI NOR sectors in one sequence then checks the content of
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the data. It expects to find the FIP binary in sector 1, 512 bytes offset from the start.
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* NAND & SPI-NAND
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These modes are rarely used in open platforms and no details are available.
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* USB
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The BootROM supports a custom USB protocol and sets the USB Gadget interface to use the
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USB ID 1b8e:c003. The Amlogic `update` utility uses this protocol. It is also supported
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in the Amlogic vendor U-Boot sources.
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The `pyamlboot` utility https://github.com/superna9999/pyamlboot is open-source and also
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implements the USB protocol. It can load U-Boot into memory to start the SoC without the
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storage being attached, or to recover the device from a failed/incorrect image flash.
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HDMI Recovery Dongle
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--------------------
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The BootROM also reads 8 bytes at address I2C 0x52 offset 0xf8 (248) on the HDMI DDC bus
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during startup. The content `boot@USB` forces USB boot. The content `boot@SDC` forces SD
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card boot. The content `boot@SPI` forces SPI-NOT boot. If an SD card or USB device does
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not enumerate the BootROM continues with the normal boot sequence.
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HDMI boot dongles can be created by connecting a 256bytes EEPROM set to answer on address
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0x52, with `boot@USB` or `boot@SDC` or `boot@SPI` programmed at offset 0xf8 (248).
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If the SoC is booted with USB Device forced at first step, it will retain the forced boot
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order on warm reboot. Only cold reboot (removing power) will reset the boot order.
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