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With latest coreboot (e.g.: v4.22.01), the instructions to enable graphics support has changed. Refresh the doc. Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
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6.7 KiB
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197 lines
6.7 KiB
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.. SPDX-License-Identifier: GPL-2.0+
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.. sectionauthor:: Bin Meng <bmeng.cn@gmail.com>
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Coreboot
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========
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Build Instructions for U-Boot as coreboot payload
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-------------------------------------------------
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Building U-Boot as a coreboot payload is just like building U-Boot for targets
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on other architectures, like below::
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$ make coreboot_defconfig
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$ make all
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Test with coreboot
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------------------
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For testing U-Boot as the coreboot payload, there are things that need be paid
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attention to. coreboot supports loading an ELF executable and a 32-bit plain
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binary, as well as other supported payloads. With the default configuration,
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U-Boot is set up to use a separate Device Tree Blob (dtb). As of today, the
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generated u-boot-dtb.bin needs to be packaged by the cbfstool utility (a tool
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provided by coreboot) manually as coreboot's 'make menuconfig' does not provide
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this capability yet. The command is as follows::
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# in the coreboot root directory
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$ ./build/util/cbfstool/cbfstool build/coreboot.rom add-flat-binary \
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-f u-boot-dtb.bin -n fallback/payload -c lzma -l 0x1110000 -e 0x1110000
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Make sure 0x1110000 matches CONFIG_TEXT_BASE, which is the symbol address
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of _x86boot_start (in arch/x86/cpu/start.S).
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If you want to use ELF as the coreboot payload, change U-Boot configuration to
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use CONFIG_OF_EMBED instead of CONFIG_OF_SEPARATE.
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To enable video you must enable CONFIG_GENERIC_LINEAR_FRAMEBUFFER in coreboot:
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- Devices->Display->Framebuffer mode->Linear "high resolution" framebuffer
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At present it seems that for Minnowboard Max, coreboot does not pass through
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the video information correctly (it always says the resolution is 0x0). This
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works correctly for link though.
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You can run via QEMU using::
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qemu-system-x86_64 -bios build/coreboot.rom -serial mon:stdio
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The `-serial mon:stdio` part shows both output in the display and on the
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console. It is optional. You can add `nographic` as well to *only* get console
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output.
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To run with a SATA drive called `$DISK`::
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qemu-system-x86_64 -bios build/coreboot.rom -serial mon:stdio \
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-drive id=disk,file=$DISK,if=none \
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-device ahci,id=ahci \
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-device ide-hd,drive=disk,bus=ahci.0
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Then you can scan it with `scsi scan` and access it normally.
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To use 4GB of memory, typically necessary for booting Linux distros, add
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`-m 4GB`.
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64-bit U-Boot
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-------------
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In addition to the 32-bit 'coreboot' build there is a 'coreboot64' build. This
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produces an image which can be booted from coreboot (32-bit). Internally it
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works by using a 32-bit SPL binary to switch to 64-bit for running U-Boot. It
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can be useful for running UEFI applications, for example with the coreboot
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build in `$CBDIR`::
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DISK=ubuntu-23.04-desktop-amd64.iso
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CBDIR=~/coreboot/build
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cp $CBDIR/coreboot.rom.in coreboot.rom
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cbfstool coreboot.rom add-flat-binary -f u-boot-x86-with-spl.bin \
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-n fallback/payload -c lzma -l 0x1110000 -e 0x1110000
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qemu-system-x86_64 -m 2G -smp 4 -bios coreboot.rom \
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-drive id=disk,file=$DISK,if=none \
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-device ahci,id=ahci \
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-device ide-hd,drive=disk,bus=ahci.0 \
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This allows booting and installing various distros, many of which are
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64-bit-only, so cannot work with the 32-bit 'coreboot' build.
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USB keyboard
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------------
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The `CONFIG_USE_PREBOOT` option is enabled by default, meaning that USB starts
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up just before the command-line starts. This allows user interaction on
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non-laptop devices which use a USB keyboard.
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CBFS access
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-----------
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You can use the 'cbfs' commands to access the Coreboot filesystem::
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=> cbfsinit
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=> cbfsinfo
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CBFS version: 0x31313132
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ROM size: 0x100000
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Boot block size: 0x4
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CBFS size: 0xffdfc
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Alignment: 64
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Offset: 0x200
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=> cbfsls
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size type name
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------------------------------------------
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32 cbfs header cbfs master header
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16720 17 fallback/romstage
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53052 17 fallback/ramstage
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398 raw config
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715 raw revision
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117 raw build_info
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4044 raw fallback/dsdt.aml
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640 cmos layout cmos_layout.bin
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17804 17 fallback/postcar
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335797 payload fallback/payload
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607000 null (empty)
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10752 bootblock bootblock
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12 file(s)
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=>
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Memory map
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----------
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========== ==================================================================
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Address Region at that address
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========== ==================================================================
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ffffffff Top of ROM (and last byte of 32-bit address space)
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7a9fd000 Typical top of memory available to U-Boot
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(use cbsysinfo to see where memory range 'table' starts)
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10000000 Memory reserved by coreboot for mapping PCI devices
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(typical size 2151000, includes framebuffer)
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1920000 CONFIG_SYS_CAR_ADDR, fake Cache-as-RAM memory, used during startup
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1110000 CONFIG_TEXT_BASE (start address of U-Boot code, before reloc)
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110000 CONFIG_BLOBLIST_ADDR (before being relocated)
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100000 CONFIG_PRE_CON_BUF_ADDR
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f0000 ACPI tables set up by U-Boot
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(typically redirects to 7ab10030 or similar)
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500 Location of coreboot sysinfo table, used during startup
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========== ==================================================================
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Debug UART
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----------
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It is possible to enable the debug UART with coreboot. To do this, use the
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info from the cbsysinfo command to locate the UART base. For example::
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=> cbsysinfo
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...
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Serial I/O port: 00000000
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base : 00000000
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pointer : 767b51bc
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type : 2
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base : fe03e000
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baud : 0d115200
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regwidth : 4
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input_hz : 0d1843200
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PCI addr : 00000010
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...
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Here you can see that the UART base is fe03e000, regwidth is 4 (1 << 2) and the
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input clock is 1843200. So you can add the following CONFIG options::
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CONFIG_DEBUG_UART=y
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CONFIG_DEBUG_UART_BASE=fe03e000
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CONFIG_DEBUG_UART_CLOCK=1843200
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CONFIG_DEBUG_UART_SHIFT=2
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CONFIG_DEBUG_UART_ANNOUNCE=y
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coreboot in CI
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--------------
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CI runs tests using a pre-built coreboot image. This ensures that U-Boot can
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boot as a coreboot payload, based on a known-good build of coreboot.
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To update the `coreboot.rom` file which is used:
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#. Build coreboot with `CONFIG_GENERIC_LINEAR_FRAMEBUFFER=y`. If using
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`make menuconfig`, this is under
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`Devices->Display->Framebuffer mode->Linear "high resolution" framebuffer`.
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#. Compress the resulting `coreboot.rom`::
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xz -c /path/to/coreboot/build/coreboot.rom > coreboot.rom.xz
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#. Upload the file to Google drive
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#. Send a patch to change the file ID used by wget in the CI yaml files.
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