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c58074af2e
MCR3000 board has some components tied to the SPI bus, like the Texas Instruments LM74 temperature sensor. Add support for SPI bus. The SPI chipselects are a bit special in the way that they are driven by 3 bits in a register of the board's CPLD where the value writen in those bits exclusively activates one of the 7 possible chipselects and value 0 sets all chipselets to inactive. So add a special GPIO driver that simulates GPIOs for those chipselect. Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu>
110 lines
2.5 KiB
C
110 lines
2.5 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* (C) Copyright 2024 CS GROUP France
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* Christophe Leroy <christophe.leroy@csgroup.eu>
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*/
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#include <asm/io.h>
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#include <dm.h>
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#include <mapmem.h>
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#include <asm/gpio.h>
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#include <malloc.h>
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#include "../common/common.h"
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struct mcr3000_spi_gpio_plat {
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ulong addr;
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};
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struct mcr3000_spi_gpio_data {
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void __iomem *base;
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};
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static int mcr3000_spi_gpio_set_value(struct udevice *dev, uint gpio, int value)
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{
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struct mcr3000_spi_gpio_data *data = dev_get_priv(dev);
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if (value)
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clrsetbits_be16(data->base, 7 << 5, (gpio & 7) << 5);
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else
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clrbits_be16(data->base, 7 << 5);
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return 0;
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}
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static int mcr3000_spi_gpio_get_value(struct udevice *dev, uint gpio)
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{
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struct mcr3000_spi_gpio_data *data = dev_get_priv(dev);
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return gpio == ((in_be16(data->base) >> 5) & 7);
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}
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static int mcr3000_spi_gpio_direction_input(struct udevice *dev, uint gpio)
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{
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return 0;
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}
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static int mcr3000_spi_gpio_get_function(struct udevice *dev, uint gpio)
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{
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return GPIOF_OUTPUT;
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}
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static int mcr3000_spi_gpio_ofdata_to_platdata(struct udevice *dev)
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{
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struct mcr3000_spi_gpio_plat *plat = dev_get_plat(dev);
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fdt_addr_t addr;
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u32 reg[2];
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dev_read_u32_array(dev, "reg", reg, 2);
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addr = dev_translate_address(dev, reg);
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plat->addr = addr;
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return 0;
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}
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static int mcr3000_spi_gpio_probe(struct udevice *dev)
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{
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struct gpio_dev_priv *uc_priv = dev_get_uclass_priv(dev);
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struct mcr3000_spi_gpio_data *data = dev_get_priv(dev);
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struct mcr3000_spi_gpio_plat *plat = dev_get_plat(dev);
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char name[32], *str;
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data->base = map_sysmem(plat->addr, 2);
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snprintf(name, sizeof(name), "CHIPSELECT@%lx_", plat->addr);
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str = strdup(name);
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if (!str)
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return -ENOMEM;
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uc_priv->bank_name = str;
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uc_priv->gpio_count = 16;
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return 0;
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}
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static const struct dm_gpio_ops gpio_mcr3000_spi_ops = {
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.get_value = mcr3000_spi_gpio_get_value,
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.set_value = mcr3000_spi_gpio_set_value,
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.direction_input = mcr3000_spi_gpio_direction_input,
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.direction_output = mcr3000_spi_gpio_set_value,
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.get_function = mcr3000_spi_gpio_get_function,
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};
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static const struct udevice_id mcr3000_spi_gpio_ids[] = {
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{ .compatible = "s3k,mcr3000-cpld-csspi"},
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{ /* sentinel */ }
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};
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U_BOOT_DRIVER(mcr3000_spi_gpio) = {
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.name = "mcr3000_spi_chipselect",
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.id = UCLASS_GPIO,
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.ops = &gpio_mcr3000_spi_ops,
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.of_to_plat = mcr3000_spi_gpio_ofdata_to_platdata,
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.plat_auto = sizeof(struct mcr3000_spi_gpio_plat),
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.of_match = mcr3000_spi_gpio_ids,
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.probe = mcr3000_spi_gpio_probe,
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.priv_auto = sizeof(struct mcr3000_spi_gpio_data),
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};
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