mirror of
https://github.com/smaeul/u-boot.git
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0c5e26678b
Add basic support for mx6q udoo board. For further information about Udoo board: http://www.udoo.org/ Tested booting a mainline device tree kernel and a Yocto rootfs from mmc. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
111 lines
2.5 KiB
C
111 lines
2.5 KiB
C
/*
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* Copyright (C) 2013 Freescale Semiconductor, Inc.
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*
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* Author: Fabio Estevam <fabio.estevam@freescale.com>
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <asm/arch/clock.h>
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#include <asm/arch/imx-regs.h>
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#include <asm/arch/iomux.h>
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#include <asm/arch/mx6-pins.h>
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#include <asm/errno.h>
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#include <asm/gpio.h>
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#include <asm/imx-common/iomux-v3.h>
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#include <mmc.h>
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#include <fsl_esdhc.h>
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#include <asm/arch/crm_regs.h>
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#include <asm/io.h>
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#include <asm/arch/sys_proto.h>
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DECLARE_GLOBAL_DATA_PTR;
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#define UART_PAD_CTRL (PAD_CTL_PUS_100K_UP | \
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PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | \
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PAD_CTL_SRE_FAST | PAD_CTL_HYS)
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#define USDHC_PAD_CTRL (PAD_CTL_PUS_47K_UP | \
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PAD_CTL_SPEED_LOW | PAD_CTL_DSE_80ohm | \
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PAD_CTL_SRE_FAST | PAD_CTL_HYS)
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#define WDT_EN IMX_GPIO_NR(5, 4)
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#define WDT_TRG IMX_GPIO_NR(3, 19)
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int dram_init(void)
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{
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gd->ram_size = (phys_size_t)CONFIG_DDR_MB * 1024 * 1024;
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return 0;
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}
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static iomux_v3_cfg_t const uart2_pads[] = {
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MX6_PAD_EIM_D26__UART2_TXD | MUX_PAD_CTRL(UART_PAD_CTRL),
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MX6_PAD_EIM_D27__UART2_RXD | MUX_PAD_CTRL(UART_PAD_CTRL),
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};
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static iomux_v3_cfg_t const usdhc3_pads[] = {
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MX6_PAD_SD3_CLK__USDHC3_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL),
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MX6_PAD_SD3_CMD__USDHC3_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL),
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MX6_PAD_SD3_DAT0__USDHC3_DAT0 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
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MX6_PAD_SD3_DAT1__USDHC3_DAT1 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
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MX6_PAD_SD3_DAT2__USDHC3_DAT2 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
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MX6_PAD_SD3_DAT3__USDHC3_DAT3 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
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};
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static iomux_v3_cfg_t const wdog_pads[] = {
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MX6_PAD_EIM_A24__GPIO_5_4 | MUX_PAD_CTRL(NO_PAD_CTRL),
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MX6_PAD_EIM_D19__GPIO_3_19,
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};
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static void setup_iomux_uart(void)
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{
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imx_iomux_v3_setup_multiple_pads(uart2_pads, ARRAY_SIZE(uart2_pads));
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}
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static void setup_iomux_wdog(void)
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{
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imx_iomux_v3_setup_multiple_pads(wdog_pads, ARRAY_SIZE(wdog_pads));
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gpio_direction_output(WDT_TRG, 0);
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gpio_direction_output(WDT_EN, 1);
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}
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static struct fsl_esdhc_cfg usdhc_cfg = { USDHC3_BASE_ADDR };
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int board_mmc_getcd(struct mmc *mmc)
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{
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return 1; /* Always present */
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}
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int board_mmc_init(bd_t *bis)
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{
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imx_iomux_v3_setup_multiple_pads(usdhc3_pads, ARRAY_SIZE(usdhc3_pads));
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usdhc_cfg.sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK);
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usdhc_cfg.max_bus_width = 4;
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return fsl_esdhc_initialize(bis, &usdhc_cfg);
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}
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int board_early_init_f(void)
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{
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setup_iomux_wdog();
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setup_iomux_uart();
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return 0;
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}
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int board_init(void)
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{
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/* address of boot parameters */
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gd->bd->bi_boot_params = PHYS_SDRAM + 0x100;
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return 0;
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}
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int checkboard(void)
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{
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puts("Board: Udoo\n");
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return 0;
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}
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