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			204 lines
		
	
	
		
			5.8 KiB
		
	
	
	
		
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			204 lines
		
	
	
		
			5.8 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
/*
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 *  linux/include/linux/mtd/nand.h
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 *
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 *  Copyright (c) 2000 David Woodhouse <dwmw2@mvhi.com>
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 *                     Steven J. Hill <sjhill@cotw.com>
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 *		       Thomas Gleixner <gleixner@autronix.de>
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 *
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 * $Id: nand.h,v 1.7 2003/07/24 23:30:46 a0384864 Exp $
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 *
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 * This program is free software; you can redistribute it and/or modify
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 * it under the terms of the GNU General Public License version 2 as
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 * published by the Free Software Foundation.
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 *
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 *  Info:
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 *   Contains standard defines and IDs for NAND flash devices
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 *
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 *  Changelog:
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 *   01-31-2000 DMW     Created
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 *   09-18-2000 SJH     Moved structure out of the Disk-On-Chip drivers
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 *			so it can be used by other NAND flash device
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 *			drivers. I also changed the copyright since none
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 *			of the original contents of this file are specific
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 *			to DoC devices. David can whack me with a baseball
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 *			bat later if I did something naughty.
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 *   10-11-2000 SJH     Added private NAND flash structure for driver
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 *   10-24-2000 SJH     Added prototype for 'nand_scan' function
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 *   10-29-2001 TG	changed nand_chip structure to support
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 *			hardwarespecific function for accessing control lines
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 *   02-21-2002 TG	added support for different read/write adress and
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 *			ready/busy line access function
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 *   02-26-2002 TG	added chip_delay to nand_chip structure to optimize
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 *			command delay times for different chips
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 *   04-28-2002 TG	OOB config defines moved from nand.c to avoid duplicate
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 *			defines in jffs2/wbuf.c
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 */
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#ifndef __LINUX_MTD_NAND_LEGACY_H
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#define __LINUX_MTD_NAND_LEGACY_H
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#ifndef CFG_NAND_LEGACY
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#error This module is for the legacy NAND support
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#endif
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/*
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 * Standard NAND flash commands
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 */
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#define NAND_CMD_READ0		0
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#define NAND_CMD_READ1		1
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#define NAND_CMD_PAGEPROG	0x10
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#define NAND_CMD_READOOB	0x50
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#define NAND_CMD_ERASE1		0x60
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#define NAND_CMD_STATUS		0x70
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#define NAND_CMD_SEQIN		0x80
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#define NAND_CMD_READID		0x90
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#define NAND_CMD_ERASE2		0xd0
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#define NAND_CMD_RESET		0xff
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/*
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 * Enumeration for NAND flash chip state
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 */
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typedef enum {
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	FL_READY,
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	FL_READING,
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	FL_WRITING,
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	FL_ERASING,
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	FL_SYNCING
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} nand_state_t;
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/*
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 * NAND Private Flash Chip Data
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 *
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 * Structure overview:
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 *
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 *  IO_ADDR - address to access the 8 I/O lines of the flash device
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 *
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 *  hwcontrol - hardwarespecific function for accesing control-lines
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 *
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 *  dev_ready - hardwarespecific function for accesing device ready/busy line
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 *
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 *  chip_lock - spinlock used to protect access to this structure
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 *
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 *  wq - wait queue to sleep on if a NAND operation is in progress
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 *
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 *  state - give the current state of the NAND device
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 *
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 *  page_shift - number of address bits in a page (column address bits)
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 *
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 *  data_buf - data buffer passed to/from MTD user modules
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 *
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 *  data_cache - data cache for redundant page access and shadow for
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 *		 ECC failure
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 *
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 *  ecc_code_buf - used only for holding calculated or read ECCs for
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 *                 a page read or written when ECC is in use
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 *
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 *  reserved - padding to make structure fall on word boundary if
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 *             when ECC is in use
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 */
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struct Nand {
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	char floor, chip;
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	unsigned long curadr;
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	unsigned char curmode;
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	/* Also some erase/write/pipeline info when we get that far */
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};
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struct nand_chip {
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	int		page_shift;
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	u_char		*data_buf;
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	u_char		*data_cache;
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	int		cache_page;
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	u_char		ecc_code_buf[6];
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	u_char		reserved[2];
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	char ChipID; /* Type of DiskOnChip */
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	struct Nand *chips;
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	int chipshift;
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	char* chips_name;
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	unsigned long erasesize;
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	unsigned long mfr; /* Flash IDs - only one type of flash per device */
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	unsigned long id;
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	char* name;
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	int numchips;
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	char page256;
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	char pageadrlen;
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	unsigned long IO_ADDR;  /* address to access the 8 I/O lines to the flash device */
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	unsigned long totlen;
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	uint oobblock;  /* Size of OOB blocks (e.g. 512) */
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	uint oobsize;   /* Amount of OOB data per block (e.g. 16) */
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	uint eccsize;
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	int bus16;
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};
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/*
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 * NAND Flash Manufacturer ID Codes
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 */
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#define NAND_MFR_TOSHIBA	0x98
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#define NAND_MFR_SAMSUNG	0xec
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/*
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 * NAND Flash Device ID Structure
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 *
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 * Structure overview:
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 *
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 *  name - Complete name of device
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 *
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 *  manufacture_id - manufacturer ID code of device.
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 *
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 *  model_id - model ID code of device.
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 *
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 *  chipshift - total number of address bits for the device which
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 *              is used to calculate address offsets and the total
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 *              number of bytes the device is capable of.
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 *
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 *  page256 - denotes if flash device has 256 byte pages or not.
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 *
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 *  pageadrlen - number of bytes minus one needed to hold the
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 *               complete address into the flash array. Keep in
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 *               mind that when a read or write is done to a
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 *               specific address, the address is input serially
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 *               8 bits at a time. This structure member is used
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 *               by the read/write routines as a loop index for
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 *               shifting the address out 8 bits at a time.
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 *
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 *  erasesize - size of an erase block in the flash device.
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 */
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struct nand_flash_dev {
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	char * name;
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	int manufacture_id;
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	int model_id;
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	int chipshift;
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	char page256;
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	char pageadrlen;
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	unsigned long erasesize;
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	int bus16;
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};
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/*
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* Constants for oob configuration
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*/
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#define NAND_NOOB_ECCPOS0		0
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#define NAND_NOOB_ECCPOS1		1
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#define NAND_NOOB_ECCPOS2		2
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#define NAND_NOOB_ECCPOS3		3
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#define NAND_NOOB_ECCPOS4		6
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#define NAND_NOOB_ECCPOS5		7
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#define NAND_NOOB_BADBPOS		-1
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#define NAND_NOOB_ECCVPOS		-1
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#define NAND_JFFS2_OOB_ECCPOS0		0
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#define NAND_JFFS2_OOB_ECCPOS1		1
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#define NAND_JFFS2_OOB_ECCPOS2		2
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#define NAND_JFFS2_OOB_ECCPOS3		3
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#define NAND_JFFS2_OOB_ECCPOS4		6
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#define NAND_JFFS2_OOB_ECCPOS5		7
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#define NAND_JFFS2_OOB_BADBPOS		5
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#define NAND_JFFS2_OOB_ECCVPOS		4
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#define NAND_JFFS2_OOB8_FSDAPOS		6
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#define NAND_JFFS2_OOB16_FSDAPOS	8
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#define NAND_JFFS2_OOB8_FSDALEN		2
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#define NAND_JFFS2_OOB16_FSDALEN	8
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unsigned long nand_probe(unsigned long physadr);
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#endif /* __LINUX_MTD_NAND_LEGACY_H */
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