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https://github.com/smaeul/u-boot.git
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6b80de790c
Add parallel nor device to distroboot for microblaze. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
173 lines
4.5 KiB
C
173 lines
4.5 KiB
C
/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* (C) Copyright 2007-2010 Michal Simek
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*
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* Michal SIMEK <monstr@monstr.eu>
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*/
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#ifndef __CONFIG_H
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#define __CONFIG_H
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/* Microblaze is microblaze_0 */
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#define XILINX_FSL_NUMBER 3
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/* MicroBlaze CPU */
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#define MICROBLAZE_V5 1
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#define CONFIG_SYS_BOOTM_LEN (64 * 1024 * 1024)
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/* uart */
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/* The following table includes the supported baudrates */
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# define CONFIG_SYS_BAUDRATE_TABLE \
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{300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200, 230400}
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/* setting reset address */
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/*#define CONFIG_SYS_RESET_ADDRESS CONFIG_SYS_TEXT_BASE*/
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#define CONFIG_SYS_MALLOC_LEN 0xC0000
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/* Stack location before relocation */
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#define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_TEXT_BASE - \
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CONFIG_SYS_MALLOC_F_LEN)
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#ifdef CONFIG_CFI_FLASH
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/* ?empty sector */
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# define CONFIG_SYS_FLASH_EMPTY_INFO 1
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/* max number of memory banks */
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# define CONFIG_SYS_MAX_FLASH_BANKS 1
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/* max number of sectors on one chip */
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# define CONFIG_SYS_MAX_FLASH_SECT 2048
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#endif
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#define CONFIG_ICACHE
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#define CONFIG_DCACHE
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#ifndef XILINX_DCACHE_BYTE_SIZE
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#define XILINX_DCACHE_BYTE_SIZE 32768
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#endif
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/*
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* BOOTP options
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*/
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#define CONFIG_BOOTP_BOOTFILESIZE
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/* size of console buffer */
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#define CONFIG_SYS_CBSIZE 512
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/* max number of command args */
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#define CONFIG_SYS_MAXARGS 15
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/* default load address */
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#define CONFIG_SYS_LOAD_ADDR 0
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#define CONFIG_HOSTNAME "microblaze-generic"
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/* architecture dependent code */
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#define CONFIG_SYS_USR_EXCEP /* user exception */
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#if defined(CONFIG_CMD_PXE) && defined(CONFIG_CMD_DHCP)
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#define BOOT_TARGET_DEVICES_PXE(func) func(PXE, pxe, na)
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#else
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#define BOOT_TARGET_DEVICES_PXE(func)
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#endif
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#if defined(CONFIG_CMD_DHCP)
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#define BOOT_TARGET_DEVICES_DHCP(func) func(DHCP, dhcp, na)
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#else
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#define BOOT_TARGET_DEVICES_DHCP(func)
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#endif
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#if defined(CONFIG_SPI_FLASH)
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# define BOOT_TARGET_DEVICES_QSPI(func) func(QSPI, qspi, na)
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#else
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# define BOOT_TARGET_DEVICES_QSPI(func)
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#endif
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#if defined(CONFIG_MTD_NOR_FLASH)
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# define BOOT_TARGET_DEVICES_NOR(func) func(NOR, nor, na)
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#else
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# define BOOT_TARGET_DEVICES_NOR(func)
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#endif
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#define BOOTENV_DEV_NOR(devtypeu, devtypel, instance) \
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"bootcmd_nor=cp.b ${script_offset_nor} ${scriptaddr} ${script_size_f} && " \
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"echo NOR: Trying to boot script at ${scriptaddr} && " \
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"source ${scriptaddr}; echo NOR: SCRIPT FAILED: continuing...;\0"
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#define BOOTENV_DEV_NAME_NOR(devtypeu, devtypel, instance) \
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"nor "
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#define BOOTENV_DEV_QSPI(devtypeu, devtypel, instance) \
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"bootcmd_qspi=sf probe 0 0 0 && " \
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"sf read ${scriptaddr} ${script_offset_f} ${script_size_f} && " \
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"echo QSPI: Trying to boot script at ${scriptaddr} && " \
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"source ${scriptaddr}; echo QSPI: SCRIPT FAILED: continuing...;\0"
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#define BOOTENV_DEV_NAME_QSPI(devtypeu, devtypel, instance) \
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"qspi "
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#define BOOT_TARGET_DEVICES_JTAG(func) func(JTAG, jtag, na)
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#define BOOTENV_DEV_JTAG(devtypeu, devtypel, instance) \
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"bootcmd_jtag=echo JTAG: Trying to boot script at ${scriptaddr} && " \
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"source ${scriptaddr}; echo JTAG: SCRIPT FAILED: continuing...;\0"
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#define BOOTENV_DEV_NAME_JTAG(devtypeu, devtypel, instance) \
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"jtag "
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#define BOOT_TARGET_DEVICES(func) \
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BOOT_TARGET_DEVICES_JTAG(func) \
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BOOT_TARGET_DEVICES_QSPI(func) \
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BOOT_TARGET_DEVICES_NOR(func) \
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BOOT_TARGET_DEVICES_DHCP(func) \
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BOOT_TARGET_DEVICES_PXE(func)
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#include <config_distro_bootcmd.h>
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#ifndef CONFIG_EXTRA_ENV_SETTINGS
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#define CONFIG_EXTRA_ENV_SETTINGS \
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"unlock=yes\0"\
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"nor0=flash-0\0"\
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"mtdparts=mtdparts=flash-0:"\
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"256k(u-boot),256k(env),3m(kernel),"\
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"1m(romfs),1m(cramfs),-(jffs2)\0"\
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"nc=setenv stdout nc;"\
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"setenv stdin nc\0" \
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"serial=setenv stdout serial;"\
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"setenv stdin serial\0"\
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"script_size_f=0x40000\0"\
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BOOTENV
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#endif
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#if defined(CONFIG_XILINX_AXIEMAC)
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# define CONFIG_SYS_FAULT_ECHO_LINK_DOWN 1
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#endif
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/* SPL part */
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#define CONFIG_SYS_UBOOT_BASE CONFIG_SYS_TEXT_BASE
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/* for booting directly linux */
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#define CONFIG_SYS_FDT_BASE (CONFIG_SYS_TEXT_BASE + \
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0x40000)
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#define CONFIG_SYS_SPL_ARGS_ADDR (CONFIG_SYS_TEXT_BASE + \
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0x1000000)
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/* SP location before relocation, must use scratch RAM */
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/* BRAM start */
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#define CONFIG_SYS_INIT_RAM_ADDR 0x0
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/* BRAM size - will be generated */
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#define CONFIG_SYS_INIT_RAM_SIZE 0x100000
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# define CONFIG_SPL_STACK_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \
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CONFIG_SYS_INIT_RAM_SIZE)
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/* Just for sure that there is a space for stack */
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#define CONFIG_SPL_STACK_SIZE 0x100
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#define CONFIG_SPL_MAX_FOOTPRINT (CONFIG_SYS_INIT_RAM_SIZE - \
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CONFIG_SYS_INIT_RAM_ADDR - \
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CONFIG_SYS_MALLOC_F_LEN - \
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CONFIG_SPL_STACK_SIZE)
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#endif /* __CONFIG_H */
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