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a94a4071d4
Replace instances of http://www.ti.com with https://www.ti.com Signed-off-by: Nishanth Menon <nm@ti.com>
86 lines
2.4 KiB
C
86 lines
2.4 KiB
C
/*
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* CPSW Ethernet Switch Driver
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*
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* Copyright (C) 2010 Texas Instruments Incorporated - https://www.ti.com/
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation version 2.
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*
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* This program is distributed "as is" WITHOUT ANY WARRANTY of any
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* kind, whether express or implied; without even the implied warranty
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* of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#ifndef _CPSW_H_
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#define _CPSW_H_
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#include <dm/ofnode.h>
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/* reg offset */
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#define CPSW_HOST_PORT_OFFSET 0x108
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#define CPSW_SLAVE0_OFFSET 0x208
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#define CPSW_SLAVE1_OFFSET 0x308
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#define CPSW_SLAVE_SIZE 0x100
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#define CPSW_CPDMA_OFFSET 0x800
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#define CPSW_HW_STATS 0x900
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#define CPSW_STATERAM_OFFSET 0xa00
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#define CPSW_CPTS_OFFSET 0xc00
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#define CPSW_ALE_OFFSET 0xd00
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#define CPSW_SLIVER0_OFFSET 0xd80
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#define CPSW_SLIVER1_OFFSET 0xdc0
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#define CPSW_BD_OFFSET 0x2000
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#define CPSW_MDIO_DIV 0xff
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#define AM335X_GMII_SEL_OFFSET 0x630
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struct cpsw_slave_data {
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u32 slave_reg_ofs;
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u32 sliver_reg_ofs;
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int phy_addr;
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int phy_if;
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ofnode phy_of_handle;
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int max_speed;
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};
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enum {
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CPSW_CTRL_VERSION_1 = 0,
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CPSW_CTRL_VERSION_2 /* am33xx like devices */
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};
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struct cpsw_platform_data {
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u32 mdio_base;
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u32 cpsw_base;
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u32 mac_id;
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u32 gmii_sel;
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int mdio_div;
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int channels; /* number of cpdma channels (symmetric) */
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u32 cpdma_reg_ofs; /* cpdma register offset */
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int slaves; /* number of slave cpgmac ports */
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u32 ale_reg_ofs; /* address lookup engine reg offset */
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int ale_entries; /* ale table size */
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u32 host_port_reg_ofs; /* cpdma host port registers */
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u32 hw_stats_reg_ofs; /* cpsw hw stats counters */
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u32 bd_ram_ofs; /* Buffer Descriptor RAM offset */
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u32 mac_control;
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struct cpsw_slave_data *slave_data;
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void (*control)(int enabled);
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u32 host_port_num;
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u32 active_slave;
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bool rmii_clock_external;
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u8 version;
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const char *phy_sel_compat;
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u32 syscon_addr;
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const char *macid_sel_compat;
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};
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int cpsw_register(struct cpsw_platform_data *data);
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int ti_cm_get_macid_addr(struct udevice *dev, int slave,
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struct cpsw_platform_data *data);
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void ti_cm_get_macid(struct udevice *dev, struct cpsw_platform_data *data,
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u8 *mac_addr);
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int cpsw_get_slave_phy_addr(struct udevice *dev, int slave);
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#endif /* _CPSW_H_ */
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