mirror of
https://github.com/smaeul/u-boot.git
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ab53bd43db
Beacon Embedded has an i.MX8M Plus development kit which consists of a SOM + baseboard. The SOM includes Bluetooth, WiFi, QSPI, eMMC, and one Ethernet PHY. The baseboard includes audio, HDMI, USB-C Dual Role port, USB Hub with five ports, a PCIe slot, and a second Ethernet PHY. The device trees are already queued for inclusion in Linux 6.3. Signed-off-by: Adam Ford <aford173@gmail.com> Reviewed-by: Tom Rini <trini@konsulko.com>
551 lines
11 KiB
Plaintext
551 lines
11 KiB
Plaintext
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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/*
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* Copyright 2023 Logic PD, Inc dba Beacon EmbeddedWorks
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*/
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/dts-v1/;
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#include <dt-bindings/usb/pd.h>
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#include <dt-bindings/phy/phy-imx8-pcie.h>
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#include "imx8mp.dtsi"
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#include "imx8mp-beacon-som.dtsi"
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/ {
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model = "Beacon EmbeddedWorks i.MX8MPlus Development kit";
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compatible = "beacon,imx8mp-beacon-kit", "fsl,imx8mp";
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aliases {
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ethernet0 = &eqos;
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ethernet1 = &fec;
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};
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chosen {
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stdout-path = &uart2;
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};
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connector {
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compatible = "usb-c-connector";
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label = "USB-C";
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data-role = "dual";
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@0 {
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reg = <0>;
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hs_ep: endpoint {
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remote-endpoint = <&usb3_hs_ep>;
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};
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};
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port@1 {
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reg = <1>;
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ss_ep: endpoint {
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remote-endpoint = <&hd3ss3220_in_ep>;
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};
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};
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};
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};
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gpio-keys {
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compatible = "gpio-keys";
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autorepeat;
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button-0 {
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label = "btn0";
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linux,code = <BTN_0>;
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gpios = <&pca6416_1 12 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
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wakeup-source;
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};
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button-1 {
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label = "btn1";
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linux,code = <BTN_1>;
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gpios = <&pca6416_1 13 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
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wakeup-source;
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};
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button-2 {
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label = "btn2";
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linux,code = <BTN_2>;
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gpios = <&pca6416_1 14 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
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wakeup-source;
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};
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button-3 {
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label = "btn3";
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linux,code = <BTN_3>;
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gpios = <&pca6416_1 15 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
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wakeup-source;
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};
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};
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leds {
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compatible = "gpio-leds";
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_led3>;
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led-0 {
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label = "gen_led0";
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gpios = <&pca6416_1 4 GPIO_ACTIVE_HIGH>;
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default-state = "off";
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};
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led-1 {
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label = "gen_led1";
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gpios = <&pca6416_1 5 GPIO_ACTIVE_HIGH>;
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default-state = "off";
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};
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led-2 {
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label = "gen_led2";
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gpios = <&pca6416_1 6 GPIO_ACTIVE_HIGH>;
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default-state = "off";
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};
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led-3 {
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label = "heartbeat";
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gpios = <&gpio4 28 GPIO_ACTIVE_HIGH>;
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linux,default-trigger = "heartbeat";
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};
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};
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pcie0_refclk: clock-pcie {
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compatible = "fixed-clock";
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#clock-cells = <0>;
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clock-frequency = <100000000>;
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};
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reg_usdhc2_vmmc: regulator-usdhc2 {
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compatible = "regulator-fixed";
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regulator-name = "VSD_3V3";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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gpio = <&gpio2 19 GPIO_ACTIVE_HIGH>;
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enable-active-high;
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startup-delay-us = <100>;
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off-on-delay-us = <20000>;
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};
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reg_usb1_host_vbus: regulator-usb1-vbus {
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compatible = "regulator-fixed";
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regulator-name = "usb1_host_vbus";
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regulator-max-microvolt = <5000000>;
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regulator-min-microvolt = <5000000>;
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gpio = <&pca6416_1 0 GPIO_ACTIVE_HIGH>;
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enable-active-high;
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};
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};
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&ecspi2 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_ecspi2>;
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cs-gpios = <&gpio5 13 GPIO_ACTIVE_LOW>;
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status = "okay";
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tpm: tpm@0 {
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compatible = "infineon,slb9670";
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reg = <0>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_tpm>;
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reset-gpios = <&gpio4 0 GPIO_ACTIVE_LOW>;
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spi-max-frequency = <18500000>;
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};
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};
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&fec {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_fec>;
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phy-mode = "rgmii-id";
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phy-handle = <ðphy1>;
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fsl,magic-packet;
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status = "okay";
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mdio {
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#address-cells = <1>;
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#size-cells = <0>;
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ethphy1: ethernet-phy@3 {
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compatible = "ethernet-phy-id0022.1640",
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"ethernet-phy-ieee802.3-c22";
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reg = <3>;
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reset-gpios = <&gpio4 18 GPIO_ACTIVE_LOW>;
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reset-assert-us = <10000>;
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reset-deassert-us = <150000>;
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interrupt-parent = <&gpio4>;
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interrupts = <2 IRQ_TYPE_LEVEL_LOW>;
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};
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};
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};
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&flexcan1 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_flexcan1>;
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status = "okay";
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};
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&gpio2 {
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usb-mux-hog {
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gpio-hog;
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gpios = <20 0>;
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output-low;
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line-name = "USB-C Mux En";
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};
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};
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&i2c2 {
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clock-frequency = <384000>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_i2c2>;
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status = "okay";
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pca6416_3: gpio@20 {
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compatible = "nxp,pcal6416";
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reg = <0x20>;
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gpio-controller;
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#gpio-cells = <2>;
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interrupt-parent = <&gpio4>;
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interrupts = <27 IRQ_TYPE_EDGE_FALLING>;
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interrupt-controller;
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#interrupt-cells = <2>;
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};
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};
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&i2c3 {
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/* Connected to USB Hub */
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usb-typec@52 {
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compatible = "nxp,ptn5110";
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reg = <0x52>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_typec>;
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interrupt-parent = <&gpio4>;
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interrupts = <1 IRQ_TYPE_LEVEL_LOW>;
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connector {
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compatible = "usb-c-connector";
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label = "USB-C";
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power-role = "source";
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data-role = "host";
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source-pdos = <PDO_FIXED(5000, 3000, PDO_FIXED_USB_COMM)>;
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};
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};
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};
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&i2c4 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_i2c4>;
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clock-frequency = <384000>;
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status = "okay";
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pca6416: gpio@20 {
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compatible = "nxp,pcal6416";
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reg = <0x20>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_pcal6414>;
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gpio-controller;
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#gpio-cells = <2>;
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interrupt-parent = <&gpio4>;
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interrupts = <27 IRQ_TYPE_EDGE_FALLING>;
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interrupt-controller;
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#interrupt-cells = <2>;
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};
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pca6416_1: gpio@21 {
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compatible = "nxp,pcal6416";
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reg = <0x21>;
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gpio-controller;
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#gpio-cells = <2>;
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interrupt-parent = <&gpio4>;
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interrupts = <27 IRQ_TYPE_EDGE_FALLING>;
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interrupt-controller;
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#interrupt-cells = <2>;
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usb-hub-hog {
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gpio-hog;
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gpios = <7 0>;
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output-low;
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line-name = "USB Hub Enable";
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};
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};
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usb-typec@47 {
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compatible = "ti,hd3ss3220";
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reg = <0x47>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_hd3ss3220>;
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interrupt-parent = <&gpio4>;
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interrupts = <19 IRQ_TYPE_LEVEL_LOW>;
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@0 {
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reg = <0>;
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hd3ss3220_in_ep: endpoint {
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remote-endpoint = <&ss_ep>;
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};
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};
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port@1 {
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reg = <1>;
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hd3ss3220_out_ep: endpoint {
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remote-endpoint = <&usb3_role_switch>;
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};
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};
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};
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};
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};
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&pcie {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_pcie>;
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reset-gpio = <&gpio4 21 GPIO_ACTIVE_LOW>;
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status = "okay";
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};
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&pcie_phy {
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fsl,refclk-pad-mode = <IMX8_PCIE_REFCLK_PAD_INPUT>;
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clocks = <&pcie0_refclk>;
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clock-names = "ref";
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status = "okay";
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};
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&snvs_pwrkey {
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status = "okay";
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};
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&uart2 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_uart2>;
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status = "okay";
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};
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&uart3 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_uart3>;
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assigned-clocks = <&clk IMX8MP_CLK_UART3>;
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assigned-clock-parents = <&clk IMX8MP_SYS_PLL1_80M>;
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uart-has-rtscts;
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status = "okay";
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};
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&usb3_0 {
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status = "okay";
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};
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&usb_dwc3_0 {
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dr_mode = "otg";
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hnp-disable;
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srp-disable;
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adp-disable;
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usb-role-switch;
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status = "okay";
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@0 {
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reg = <0>;
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usb3_hs_ep: endpoint {
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remote-endpoint = <&hs_ep>;
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};
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};
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port@1 {
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reg = <1>;
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usb3_role_switch: endpoint {
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remote-endpoint = <&hd3ss3220_out_ep>;
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};
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};
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};
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};
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&usb3_phy0 {
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vbus-supply = <®_usb1_host_vbus>;
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status = "okay";
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};
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&usb3_1 {
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status = "okay";
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};
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&usb_dwc3_1 {
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dr_mode = "host";
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status = "okay";
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};
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&usb3_phy1 {
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status = "okay";
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};
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&usdhc2 {
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pinctrl-names = "default", "state_100mhz", "state_200mhz";
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pinctrl-0 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>;
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pinctrl-1 = <&pinctrl_usdhc2_100mhz>, <&pinctrl_usdhc2_gpio>;
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pinctrl-2 = <&pinctrl_usdhc2_200mhz>, <&pinctrl_usdhc2_gpio>;
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cd-gpios = <&gpio2 12 GPIO_ACTIVE_LOW>;
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vmmc-supply = <®_usdhc2_vmmc>;
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bus-width = <4>;
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status = "okay";
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};
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&iomuxc {
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pinctrl_ecspi2: ecspi2grp {
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fsl,pins = <
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MX8MP_IOMUXC_ECSPI2_SCLK__ECSPI2_SCLK 0x82
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MX8MP_IOMUXC_ECSPI2_MOSI__ECSPI2_MOSI 0x82
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MX8MP_IOMUXC_ECSPI2_MISO__ECSPI2_MISO 0x82
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MX8MP_IOMUXC_ECSPI2_SS0__GPIO5_IO13 0x40000
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>;
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};
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pinctrl_fec: fecgrp {
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fsl,pins = <
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MX8MP_IOMUXC_SAI1_RXD2__ENET1_MDC 0x2
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MX8MP_IOMUXC_SAI1_RXD3__ENET1_MDIO 0x2
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MX8MP_IOMUXC_SAI1_RXD4__ENET1_RGMII_RD0 0x90
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MX8MP_IOMUXC_SAI1_RXD5__ENET1_RGMII_RD1 0x90
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MX8MP_IOMUXC_SAI1_RXD6__ENET1_RGMII_RD2 0x90
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MX8MP_IOMUXC_SAI1_RXD7__ENET1_RGMII_RD3 0x90
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MX8MP_IOMUXC_SAI1_TXC__ENET1_RGMII_RXC 0x90
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MX8MP_IOMUXC_SAI1_TXFS__ENET1_RGMII_RX_CTL 0x90
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MX8MP_IOMUXC_SAI1_TXD0__ENET1_RGMII_TD0 0x16
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MX8MP_IOMUXC_SAI1_TXD1__ENET1_RGMII_TD1 0x16
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MX8MP_IOMUXC_SAI1_TXD2__ENET1_RGMII_TD2 0x16
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MX8MP_IOMUXC_SAI1_TXD3__ENET1_RGMII_TD3 0x16
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MX8MP_IOMUXC_SAI1_TXD4__ENET1_RGMII_TX_CTL 0x16
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MX8MP_IOMUXC_SAI1_TXD5__ENET1_RGMII_TXC 0x16
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MX8MP_IOMUXC_SAI1_RXD0__GPIO4_IO02 0x140
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MX8MP_IOMUXC_SAI1_TXD6__GPIO4_IO18 0x10
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>;
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};
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pinctrl_flexcan1: flexcan1grp {
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fsl,pins = <
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MX8MP_IOMUXC_SPDIF_RX__CAN1_RX 0x154
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MX8MP_IOMUXC_SPDIF_TX__CAN1_TX 0x154
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>;
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};
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pinctrl_hd3ss3220: hd3ss3220grp {
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fsl,pins = <
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MX8MP_IOMUXC_SAI1_TXD7__GPIO4_IO19 0x140
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>;
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};
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pinctrl_i2c2: i2c2grp {
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fsl,pins = <
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MX8MP_IOMUXC_I2C2_SCL__I2C2_SCL 0x400001c2
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MX8MP_IOMUXC_I2C2_SDA__I2C2_SDA 0x400001c2
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>;
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};
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pinctrl_i2c4: i2c4grp {
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fsl,pins = <
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MX8MP_IOMUXC_I2C4_SCL__I2C4_SCL 0x400001c2
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MX8MP_IOMUXC_I2C4_SDA__I2C4_SDA 0x400001c2
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>;
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};
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pinctrl_led3: led3grp {
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fsl,pins = <
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MX8MP_IOMUXC_SAI3_RXFS__GPIO4_IO28 0x41
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>;
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};
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pinctrl_pcal6414: pcal6414-gpiogrp {
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fsl,pins = <
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MX8MP_IOMUXC_SAI2_MCLK__GPIO4_IO27 0x10
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>;
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};
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pinctrl_pcie: pciegrp {
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fsl,pins = <
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MX8MP_IOMUXC_GPIO1_IO05__GPIO1_IO05 0x10 /* PCIe_nDIS */
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MX8MP_IOMUXC_SAI2_RXFS__GPIO4_IO21 0x10 /* PCIe_nRST */
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>;
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};
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pinctrl_reg_usdhc2_vmmc: regusdhc2vmmcgrp {
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fsl,pins = <
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MX8MP_IOMUXC_SD2_RESET_B__GPIO2_IO19 0x40
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>;
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};
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pinctrl_tpm: tpmgrp {
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fsl,pins = <
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MX8MP_IOMUXC_SAI1_RXFS__GPIO4_IO00 0x19 /* Reset */
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MX8MP_IOMUXC_SAI3_RXC__GPIO4_IO29 0x1d6 /* IRQ */
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>;
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};
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pinctrl_typec: typec1grp {
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fsl,pins = <
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MX8MP_IOMUXC_SAI1_RXC__GPIO4_IO01 0xc4
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>;
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};
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pinctrl_uart2: uart2grp {
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fsl,pins = <
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MX8MP_IOMUXC_UART2_RXD__UART2_DCE_RX 0x140
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MX8MP_IOMUXC_UART2_TXD__UART2_DCE_TX 0x140
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>;
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};
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pinctrl_uart3: uart3grp {
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fsl,pins = <
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MX8MP_IOMUXC_ECSPI1_SCLK__UART3_DCE_RX 0x140
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MX8MP_IOMUXC_ECSPI1_MOSI__UART3_DCE_TX 0x140
|
|
MX8MP_IOMUXC_ECSPI1_SS0__UART3_DCE_RTS 0x140
|
|
MX8MP_IOMUXC_ECSPI1_MISO__UART3_DCE_CTS 0x140
|
|
>;
|
|
};
|
|
|
|
pinctrl_usdhc2: usdhc2grp {
|
|
fsl,pins = <
|
|
MX8MP_IOMUXC_SD2_CLK__USDHC2_CLK 0x190
|
|
MX8MP_IOMUXC_SD2_CMD__USDHC2_CMD 0x1d0
|
|
MX8MP_IOMUXC_SD2_DATA0__USDHC2_DATA0 0x1d0
|
|
MX8MP_IOMUXC_SD2_DATA1__USDHC2_DATA1 0x1d0
|
|
MX8MP_IOMUXC_SD2_DATA2__USDHC2_DATA2 0x1d0
|
|
MX8MP_IOMUXC_SD2_DATA3__USDHC2_DATA3 0x1d0
|
|
MX8MP_IOMUXC_GPIO1_IO04__USDHC2_VSELECT 0xc0
|
|
>;
|
|
};
|
|
|
|
pinctrl_usdhc2_100mhz: usdhc2-100mhzgrp {
|
|
fsl,pins = <
|
|
MX8MP_IOMUXC_SD2_CLK__USDHC2_CLK 0x194
|
|
MX8MP_IOMUXC_SD2_CMD__USDHC2_CMD 0x1d4
|
|
MX8MP_IOMUXC_SD2_DATA0__USDHC2_DATA0 0x1d4
|
|
MX8MP_IOMUXC_SD2_DATA1__USDHC2_DATA1 0x1d4
|
|
MX8MP_IOMUXC_SD2_DATA2__USDHC2_DATA2 0x1d4
|
|
MX8MP_IOMUXC_SD2_DATA3__USDHC2_DATA3 0x1d4
|
|
MX8MP_IOMUXC_GPIO1_IO04__USDHC2_VSELECT 0xc0
|
|
>;
|
|
};
|
|
|
|
pinctrl_usdhc2_200mhz: usdhc2-200mhzgrp {
|
|
fsl,pins = <
|
|
MX8MP_IOMUXC_SD2_CLK__USDHC2_CLK 0x196
|
|
MX8MP_IOMUXC_SD2_CMD__USDHC2_CMD 0x1d6
|
|
MX8MP_IOMUXC_SD2_DATA0__USDHC2_DATA0 0x1d6
|
|
MX8MP_IOMUXC_SD2_DATA1__USDHC2_DATA1 0x1d6
|
|
MX8MP_IOMUXC_SD2_DATA2__USDHC2_DATA2 0x1d6
|
|
MX8MP_IOMUXC_SD2_DATA3__USDHC2_DATA3 0x1d6
|
|
MX8MP_IOMUXC_GPIO1_IO04__USDHC2_VSELECT 0xc0
|
|
>;
|
|
};
|
|
|
|
pinctrl_usdhc2_gpio: usdhc2gpiogrp {
|
|
fsl,pins = <
|
|
MX8MP_IOMUXC_SD2_CD_B__GPIO2_IO12 0x1c4
|
|
>;
|
|
};
|
|
};
|