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	Enabled ID_EEPROM and I2C configuration for StarFive VisionFive2 board. Signed-off-by: Yanhong Wang <yanhong.wang@starfivetech.com> Reviewed-By: Leo Yu-Chi Linag <ycliang@andestech.com>
		
			
				
	
	
		
			54 lines
		
	
	
		
			1.1 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			54 lines
		
	
	
		
			1.1 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
| // SPDX-License-Identifier: GPL-2.0+
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| /*
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|  * Copyright (C) 2022 StarFive Technology Co., Ltd.
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|  * Author: Yanhong Wang<yanhong.wang@starfivetech.com>
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|  */
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| 
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| #include <common.h>
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| #include <asm/io.h>
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| #include <asm/sections.h>
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| #include <cpu_func.h>
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| #include <dm.h>
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| #include <linux/bitops.h>
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| 
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| #define JH7110_L2_PREFETCHER_BASE_ADDR		0x2030000
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| #define JH7110_L2_PREFETCHER_HART_OFFSET	0x2000
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| 
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| /* enable U74-mc hart1~hart4 prefetcher */
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| static void enable_prefetcher(void)
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| {
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| 	u8 hart;
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| 	u32 *reg;
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| 
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| 	/* JH7110 use U74MC CORE IP, it include five cores(one S7 and four U7),
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| 	 * but only U7 cores support prefetcher configuration
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| 	 */
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| 	for (hart = 1; hart < 5; hart++) {
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| 		reg = (void *)(u64)(JH7110_L2_PREFETCHER_BASE_ADDR
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| 					+ hart * JH7110_L2_PREFETCHER_HART_OFFSET);
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| 
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| 		mb(); /* memory barrier */
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| 		setbits_le32(reg, 0x1);
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| 		mb(); /* memory barrier */
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| 	}
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| }
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| 
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| int board_init(void)
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| {
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| 	enable_caches();
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| 	enable_prefetcher();
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| 
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| 	return 0;
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| }
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| 
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| void *board_fdt_blob_setup(int *err)
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| {
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| 	*err = 0;
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| 	if (IS_ENABLED(CONFIG_OF_SEPARATE) || IS_ENABLED(CONFIG_OF_BOARD)) {
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| 		if (gd->arch.firmware_fdt_addr)
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| 			return (ulong *)(uintptr_t)gd->arch.firmware_fdt_addr;
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| 	}
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| 
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| 	return (ulong *)&_end;
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| }
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