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3682cc3d2c
Select the port ordering for I2C on Seaboard. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
93 lines
1.5 KiB
Plaintext
93 lines
1.5 KiB
Plaintext
/dts-v1/;
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/memreserve/ 0x1c000000 0x04000000;
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/include/ ARCH_CPU_DTS
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/ {
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model = "NVIDIA Seaboard";
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compatible = "nvidia,seaboard", "nvidia,tegra20";
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chosen {
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bootargs = "vmalloc=192M video=tegrafb console=ttyS0,115200n8 root=/dev/mmcblk1p3 rw rootwait";
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};
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aliases {
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/* This defines the order of our USB ports */
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usb0 = "/usb@c5008000";
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usb1 = "/usb@c5000000";
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i2c0 = "/i2c@7000d000";
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i2c1 = "/i2c@7000c000";
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i2c2 = "/i2c@7000c400";
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i2c3 = "/i2c@7000c500";
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};
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memory {
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device_type = "memory";
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reg = < 0x00000000 0x40000000 >;
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};
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/* This is not used in U-Boot, but is expected to be in kernel .dts */
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i2c@7000d000 {
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clock-frequency = <100000>;
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pmic@34 {
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compatible = "ti,tps6586x";
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reg = <0x34>;
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clk_32k: clock {
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compatible = "fixed-clock";
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/*
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* leave out for now due to CPP:
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* #clock-cells = <0>;
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*/
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clock-frequency = <32768>;
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};
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};
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};
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clocks {
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osc {
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clock-frequency = <12000000>;
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};
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};
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clock@60006000 {
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clocks = <&clk_32k &osc>;
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};
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serial@70006300 {
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clock-frequency = < 216000000 >;
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};
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sdhci@c8000400 {
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cd-gpios = <&gpio 69 0>; /* gpio PI5 */
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wp-gpios = <&gpio 57 0>; /* gpio PH1 */
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power-gpios = <&gpio 70 0>; /* gpio PI6 */
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};
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sdhci@c8000600 {
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support-8bit;
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};
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usb@c5000000 {
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nvidia,vbus-gpio = <&gpio 24 0>; /* PD0 */
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dr_mode = "otg";
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};
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usb@c5004000 {
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status = "disabled";
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};
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i2c@7000c000 {
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clock-frequency = <100000>;
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};
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i2c@7000c400 {
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status = "disabled";
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};
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i2c@7000c500 {
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clock-frequency = <100000>;
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};
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};
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