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	Use a driver name in line with the compatible string so that of-platdata can use this driver. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
		
			
				
	
	
		
			115 lines
		
	
	
		
			2.6 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			115 lines
		
	
	
		
			2.6 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
| // SPDX-License-Identifier: GPL-2.0+
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| /*
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|  * Copyright 2019 Google, LLC
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|  * Written by Simon Glass <sjg@chromium.org>
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|  */
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| 
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| #define LOG_CATEGORY	UCLASS_IRQ
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| 
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| #include <common.h>
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| #include <dm.h>
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| #include <irq.h>
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| #include <log.h>
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| #include <acpi/acpi_device.h>
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| #include <asm/io.h>
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| #include <dt-bindings/interrupt-controller/irq.h>
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| #include <dt-bindings/interrupt-controller/x86-irq.h>
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| 
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| /**
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|  * struct acpi_gpe_priv - private driver information
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|  *
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|  * @acpi_base: Base I/O address of ACPI registers
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|  */
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| struct acpi_gpe_priv {
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| 	ulong acpi_base;
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| };
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| 
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| #define GPE0_STS(x)		(0x20 + ((x) * 4))
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| 
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| static int acpi_gpe_read_and_clear(struct irq *irq)
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| {
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| 	struct acpi_gpe_priv *priv = dev_get_priv(irq->dev);
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| 	u32 mask, sts;
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| 	ulong start;
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| 	int ret = 0;
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| 	int bank;
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| 
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| 	bank = irq->id / 32;
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| 	mask = 1 << (irq->id % 32);
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| 
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| 	/* Wait up to 1ms for GPE status to clear */
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| 	start = get_timer(0);
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| 	do {
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| 		if (get_timer(start) > 1)
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| 			return ret;
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| 
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| 		sts = inl(priv->acpi_base + GPE0_STS(bank));
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| 		if (sts & mask) {
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| 			outl(mask, priv->acpi_base + GPE0_STS(bank));
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| 			ret = 1;
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| 		}
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| 	} while (sts & mask);
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| 
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| 	return ret;
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| }
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| 
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| static int acpi_gpe_of_to_plat(struct udevice *dev)
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| {
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| 	struct acpi_gpe_priv *priv = dev_get_priv(dev);
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| 
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| 	priv->acpi_base = dev_read_addr(dev);
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| 	if (!priv->acpi_base || priv->acpi_base == FDT_ADDR_T_NONE)
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| 		return log_msg_ret("acpi_base", -EINVAL);
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| 
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| 	return 0;
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| }
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| 
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| static int acpi_gpe_of_xlate(struct irq *irq, struct ofnode_phandle_args *args)
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| {
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| 	irq->id = args->args[0];
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| 	irq->flags = args->args[1];
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| 
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| 	return 0;
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| }
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| 
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| #if CONFIG_IS_ENABLED(ACPIGEN)
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| static int acpi_gpe_get_acpi(const struct irq *irq, struct acpi_irq *acpi_irq)
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| {
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| 	memset(acpi_irq, '\0', sizeof(*acpi_irq));
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| 	acpi_irq->pin = irq->id;
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| 	acpi_irq->mode = irq->flags & IRQ_TYPE_EDGE_BOTH ?
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| 		ACPI_IRQ_EDGE_TRIGGERED : ACPI_IRQ_LEVEL_TRIGGERED;
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| 	acpi_irq->polarity = irq->flags &
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| 		 (IRQ_TYPE_EDGE_FALLING | IRQ_TYPE_LEVEL_LOW) ?
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| 		 ACPI_IRQ_ACTIVE_LOW : ACPI_IRQ_ACTIVE_HIGH;
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| 	acpi_irq->shared = irq->flags & X86_IRQ_TYPE_SHARED ?
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| 		ACPI_IRQ_SHARED : ACPI_IRQ_EXCLUSIVE;
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| 	acpi_irq->wake = irq->flags & X86_IRQ_TYPE_WAKE ? ACPI_IRQ_WAKE :
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| 		ACPI_IRQ_NO_WAKE;
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| 
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| 	return 0;
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| }
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| #endif
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| 
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| static const struct irq_ops acpi_gpe_ops = {
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| 	.read_and_clear		= acpi_gpe_read_and_clear,
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| 	.of_xlate		= acpi_gpe_of_xlate,
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| #if CONFIG_IS_ENABLED(ACPIGEN)
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| 	.get_acpi		= acpi_gpe_get_acpi,
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| #endif
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| };
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| 
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| static const struct udevice_id acpi_gpe_ids[] = {
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| 	{ .compatible = "intel,acpi-gpe", .data = X86_IRQT_ACPI_GPE },
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| 	{ }
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| };
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| 
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| U_BOOT_DRIVER(intel_acpi_gpe) = {
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| 	.name		= "intel_acpi_gpe",
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| 	.id		= UCLASS_IRQ,
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| 	.of_match	= acpi_gpe_ids,
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| 	.ops		= &acpi_gpe_ops,
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| 	.of_to_plat	= acpi_gpe_of_to_plat,
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| 	.priv_auto	= sizeof(struct acpi_gpe_priv),
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| };
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